IDT72V71643BC datasheet(7/30 Pages) IDT

Part #	IDT72V71643BC

Description	3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH WITH RATE MATCHING

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Manufacturer	IDT [Integrated Device Technology]

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COMMERCIAL TEMPERATURE RANGE

IDT72V71643 3.3V TIME SLOT INTERCHANGE

DIGITAL SWITCH 4,096 x 4,096

If the LPBK bit is high, the associated TX output channel data is internally

looped back to the RX input channel (i.e., RXn channel m data comes from the

TXn channel m). If the LPBK bit is low, the loopback feature is disabled. For

proper per-channel loopback operation, the contents of the frame delay offset

registers must be set to zero and the device must be in regular switch mode

(DR3-0 = 0x0, 0x1 or 0x2).

OUTPUT ENABLE INDICATION

TheIDT72V71643hasthecapabilitytoindicatethestateoftheoutputs(active

or three-state) by enabling the Output Enable Indication (OEI) in the control

register. IntheOEImodehowever,onlyhalfoftheoutputstreamsareavailable.

If this same capability is desired with all 32 streams, this can be accomplished

byusingtwoIDT72V71643devices. Inonedevice,theAllOutputEnable(AOE)

bitissettoaonewhileintheothertheAOEissettozero. Inthisway,onedevice

acts as the switch and the other as a three-state control device. See Figure 8.

It is important to note if the TSI device is programmed for AOE and the OEI is

also set, the device will be in the AOE mode not OEI.

INITIALIZATION OF THE IDT72V71643

Afterpowerup,theIDT72V71643shouldbereset.Duringreset,theinternal

registersareputintotheirdefaultstateandallTXoutputsareputintothree-state.

After reset however, the state of Connection Memory is unknown. As such, the

outputsshouldbeputinhigh-impedancebyholdingtheODElow.WhiletheODE

is low, the microprocessor can initialize the device, program the active paths,

anddisableunusedoutputsbyprogrammingtheOEbitinConnectionMemory.

Once the device is configured, the ODE pin (or OSB bit depending on

initialization) can be switched.

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