7.17

2

IDT54/74FCT543/A/C

FAST CMOS OCTAL LATCHED TRANSCEIVER

MILITARY AND COMMERCIAL TEMPERATURE RANGES

PIN CONFIGURATIONS

IDT54/74FCT861 10-BIT TRANSCEIVERS

PIN DESCRIPTION

Pin Names

Description

OEAB

A-to-B Output Enable Input (Active LOW)

OEBA

B-to-A Output Enable Input (Active LOW)

CEAB

A-to-B Enable Input (Active LOW)

CEBA

B-to-A Enable Input (Active LOW)

LEAB

A-to-B Latch Enable Input (Active LOW)

LEBA

B-to-A Latch Enable Input (Active LOW)

A-to-B Data Inputs or B-to-A 3-State Outputs

B-to-A Data Inputs or A-to-B 3-State Outputs

2614 tbl 02

FUNCTION TABLE

(1,2)

For A-to-B (Symmetric with B-to-A)

Latch

Output

Inputs

Status

Buffers

CEAB

CEAB

LEAB

LEAB

OEAB

OEAB

A-to-B

H

—

—

Storing

High Z

—

H

—

Storing

—

—

—

H

—

High Z

L

L

L

Transparent

Current A Inputs

L

H

L

Storing

Previous* A Inputs

LOGIC SYMBOL

2614 drw 03

OEBA

OEAB

LEAB CEAB CEBA LEBA

LCC

TOP VIEW

NOTES:

2614 tbl 01

1. * Before

LEAB LOW-to-HIGH Transition

H = HIGH Voltage Level

L = LOW Voltage Level

— = Don’t Care or Irrelevant

2. A-to-B data flow shown; B-to-A flow control is the same, except using

CEBA, LEBA and OEBA.

DIP/SOIC/CERPACK

TOP VIEW

2614 drw 02

5

6

7

8

9

10

11

L28-1

25

24

23

22

21

20

19

INDEX

NC

NC

12 13 14 15 16 17 18

43

2

1

28 27 26

5

6

7

8

9

10

11

12

GND

1

2

3

4

24

23

22

21

20

19

18

17

Vcc

16

15

14

13

P24-1,

D24-1,

SO24-2

&

E24-1

LEAB

OEAB

LEBA

OEBA

CEAB

CEBA