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AD1941 Datasheet(PDF) 3 Page - Analog Devices |
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AD1941 Datasheet(HTML) 3 Page - Analog Devices |
3 / 36 page AD1940/AD1941 Rev. B | Page 3 of 3 6 SPECIFICATIONS Test conditions, unless otherwise noted. Table 1. Parameter Conditions Supply Voltage (VDD) 2.5 V PLL Voltage (PLL_VDD) 2.5 V Output Voltage (ODVDD) 5.0 V INVDD Voltage 5.0 V Ambient Temperature 25°C Master Clock Input 3.072 MHz, 64 × fs mode Load Capacitance 50 pF Load Current ±1 mA Input Voltage, HI 2.4 V Input Voltage, LO 0.8 V DIGITAL I/O VDD = 2.25 V to 2.75 V. Specifications measured across −40°C to 125°C (case). Table 2. Parameter Comments Min Max Unit Input Voltage, HI (VIH) 2.1 V Input Voltage, LO (VIL) 0.8 V Input Leakage (IIH) 10 μA Input Leakage (IIL) 10 μA High Level Output Voltage (VOH) ODVDD = 4.5 V, IOH = 1 mA 3.9 V High Level Output Voltage (VOH) ODVDD = 3.0 V, IOH = 1 mA 2.6 V Low Level Output Voltage (VOL) ODVDD = 4.5 V, IOL = 1 mA1 0.4 V Low Level Output Voltage (VOL) ODVDD = 3.0 V, IOL = 1 mA1 0.3 V Input Capacitance 5 pF 1 SDA is measured with a 3 mA sink current. POWER Table 3. Parameter Min Typ Max1 Unit SUPPLIES Voltage 2.25 2.5 2.75 V Digital Current 92 1552 mA PLL Current 3.5 8 mA Digital Current, Reset 4.53 133 mA PLL Current, Reset 3 8.5 mA DISSIPATION Operation, All Supplies 238.8 mW Reset, All Supplies 10.8 mW 1 Maximum specifications are measured across −40°C to 125°C (case) and across VDD = 2.25 V to 2.75 V. 2 Measurement running a typical large program that writes to all 16 outputs with 0 dB digital sine waves applied to all eight inputs. The end user’s program may differ. 3 The digital reset current is specified for the given test conditions. This current scales with the input MCLK rate, so higher input clocks draw more current while in reset. |
Similar Part No. - AD1941_15 |
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Similar Description - AD1941_15 |
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