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FC80960HD50SL2GM Datasheet(PDF) 7 Page - Intel Corporation |
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FC80960HD50SL2GM Datasheet(HTML) 7 Page - Intel Corporation |
7 / 102 page 80960HA/HD/HT Advance Information Datasheet 1 1.0 About This Document This document describes the parametric performance of Intel’s 80960Hx embedded superscalar microprocessors. Detailed descriptions for functional topics — other than parametric performance — are published in the i960® Hx Microprocessor User’s Guide (272484). In this document, “80960Hx” and “i960 Hx processor” refer to the products described in Table 1. Throughout this document, information that is specific to each is clearly indicated. 2.0 Intel’s 80960Hx Processor Intel’s 80960Hx processor provides new performance levels while maintaining backward compatibility (pin1 and software) with the i960 CA/CF processor. This newest member of the family of i960 32-bit, RISC-style, embedded processors allows customers to create scalable designs that meet multiple price and performance points. This is accomplished by providing processors that can run at the bus speed or faster using Intel’s clock multiplying technology (Table 1).The 80960Hx core is capable of issuing 150 million instructions per second, using a sophisticated instruction scheduler that allows the processor to sustain a throughput of two instructions every core clock, with a peak performance of three instructions per clock. The 80960Hx-series comprises three processors, which differ in the ratio of core clock speed to external bus speed. 1. The 80960Hx is not “drop-in” compatible in an 80960Cx-based system. Customers can design systems that accept either 80960Hx or Cx processors. Figure 1. 80960Hx Block Diagram Execution Unit Programmable Bus Controller Bus Request Queues Six-Port Register File 32-bit Base Bus Instruction Cache 128-Bit Cache Bus Instruction Prefetch Queue Interrupt Controller Control Address Data Memory-Side Machine Bus Register-Side Machine Bus Memory Region Configuration Multiply/Divide Unit Interrupt Port Address Generation Unit Data Cache 16 Kbyte, Four-Way Set-Associative 8 Kbyte, Four-Way Set-Associative Guarded Memory Unit Timers JTAG Port Parallel Instruction Scheduler Data RAM - 2 Kbyte Register Cache- 5to15sets 64-bit SRC1 Bus 64-bit SRC2 Bus 64-bit DST Bus 128-bit Load Bus 128-bit Store Bus Table 1. 80960Hx Product Description Product Core Voltage Operating Frequency (bus/core) 80960HA 1x 3.3 V* 25/25, 33/33, 40/40 80960HD 2x 3.3 V* 16/32, 25/50, 33/66, 40/80 80960HT 3x 3.3 V* 20/60, 25/75 *Processor inputs are 5 V tolerant. |
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