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AD7541KN Datasheet(PDF) 2 Page - Intersil Corporation |
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AD7541KN Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 8 page 10-10 Absolute Maximum Ratings Thermal Information Supply Voltage (V+ to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . +17V VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V Digital Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . V+ to GND Output Voltage Compliance . . . . . . . . . . . . . . . . . . . . -100mV to V+ Operating Conditions Temperature Range JN, KN, LN Versions . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC Thermal Resistance (Typical, Note 1) θ JA ( oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature . . . . . . . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications V+ = +15V, VREF = +10V, VOUT1 = VOUT2 = 0V, TA = 25 oC, Unless Otherwise Specified PARAMETER TEST CONDITIONS TA = 25 oCT A MIN-MAX UNITS MIN TYP MAX MIN MAX SYSTEM PERFORMANCE Resolution 12 - - 12 - Bits Nonlinearity A, S, J -10V ≤ VREF ≤ +10V VOUT1 = VOUT2 = 0V See Figure 3 (Note 5) -- ±0.024 - ±0.024 % of FSR B, T, K - - ±0.012 - ±0.012 % of FSR L- - ±0.012 - ±0.012 % of FSR Monotonicity Guaranteed Gain Error -10V ≤ VREF ≤ +10V (Note 5) - - ±0.3 - ±0.4 % of FSR Output Leakage Current (Either Output) VOUT1 = VOUT2 = 0 - - ±50 - ±200 nA DYNAMIC CHARACTERISTICS Power Supply Rejection V+ = 14.5V to 15.5V See Figure 5 (Note 5) -- ±0.005 - ±0.01 % of FSR/% of ∆V+ Output Current Settling Time To 0.1% of FSR See Figure 9 (Note 6) -- 1 - 1 µs Feedthrough Error VREF = 20VP-P, 10kHz All Digital Inputs Low See Figure 8 (Note 6) -- 1 - 1 mVP-P REFERENCE INPUTS Input Resistance All Digital Inputs High IOUT1 at Ground 5 10 20 5 20 k Ω ANALOG OUTPUT Voltage Compliance Both Outputs, See Maximum Ratings (Note 7) -100mV to V+ Output Capacitance COUT1 All Digital Inputs High See Figure 7 (Note 6) - - 200 - 200 pF COUT2 - - 60 - 60 pF COUT1 All Digital Inputs Low) See Figure 7 (Note 6) - - 60 - 60 pF COUT2 - - 200 - 200 pF Output Noise (Both Outputs) See Figure 6 Equivalent to 10k Ω Johnson Noise DIGITAL INPUTS Low State Threshold, VIL (Notes 2, 6) - - 0.8 - 0.8 V High State Threshold, VIH 2.4 - - 2.4 - V AD7541 |
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