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AD7541A Datasheet(PDF) 2 Page - Analog Devices |
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AD7541A Datasheet(HTML) 2 Page - Analog Devices |
2 / 8 page –2– REV. B AD7541A–SPECIFICATIONS TA =TA = Parameter Version +25 CTMIN, TMAX 1 Units Test Conditions/Comments ACCURACY Resolution All 12 12 Bits Relative Accuracy J, A, S ± 1 ± 1 LSB max ± 1 LSB = ±0.024% of Full Scale K, B, T ± 1/2 ± 1/2 LSB max ± 1/2 LSB = ± 0.012% of Full Scale Differential Nonlinearity J, A, S ± 1 ± 1 LSB max All Grades Guaranteed Monotonic K, B, T ± 1/2 ± 1/2 LSB max to 12 Bits, TMIN to TMAX. Gain Error J, A, S ± 6 ± 8 LSB max Measured Using Internal RFB and Includes K, B, T ± 3 ± 5 LSB max Effect of Leakage Current and Gain TC. Gain Error Can Be Trimmed to Zero. Gain Temperature Coefficient 2 Gain/ Temperature All 5 5 ppm/ °C max Typical Value Is 2 ppm/ °C. Output Leakage Current OUT1 (Pin 1) J, K ± 5 ± 10 nA max All Digital Inputs = 0 V. A, B ± 5 ± 10 nA max S, T ± 5 ± 200 nA max OUT2 (Pin 2) J, K ± 5 ± 10 nA max All Digital Inputs = VDD. A, B ± 5 ± 10 nA max S, T ± 5 ± 200 nA max REFERENCE INPUT Input Resistance (Pin 17 to GND) All 7–18 7–18 k Ω min/max Typical Input Resistance = 11 k Ω. Typical Input Resistance Temperature Coefficient = –300 ppm/ °C. DIGITAL INPUTS VIH (Input HIGH Voltage) All 2.4 2.4 V min VIL (Input LOW Voltage) All 0.8 0.8 V max IIN (Input Current) All ± 1 ± 1 µA max Logic Inputs Are MOS Gates. IIN typ (25 °C) = 1 nA. CIN (Input Capacitance) 2 All 8 8 pF max VIN = 0 V POWER SUPPLY REJECTION Gain/ VDD All ± 0.01 ± 0.02 % per % max VDD = ± 5% POWER SUPPLY VDD Range All +5 to +16 +5 to +16 V min/V max Accuracy Is Not Guaranteed Over This Range. IDD All 2 2 mA max All Digital Inputs VIL or VIH. 100 500 µA max All Digital Inputs 0 V or VDD. AC PERFORMANCE CHARACTERISTICS These Characteristics are included for Design Guidance only and are not subject to test. VDD = +15 V, VIN = +10 V except where noted, OUT1 = 0UT2 = GND = 0 V, Output Amp is AD544 except where noted. TA =TA = Parameter Version 1 +25 CTMIN, TMAX 1 Units Test Conditions/Comments PROPAGATION DELAY (From Digital Input OUT 1 Load = 100 Ω, C EXT = 13 pF. Change to 90% of Final Analog Output) All 100 — ns typ Digital Inputs = 0 V to VDD or VDD to 0 V. DIGITAL TO ANALOG GLITCH VREF = 0 V. All digital inputs 0 V to VDD or IMPULSE VDD to 0 V. All 1000 — nV-sec typ Measured using Model 50K as output amplifier. MULTIPLYING FEEDTHROUGH ERROR 3 (VREF to OUT1) All 1.0 — mV p-p typ VREF = ± 10 V, 10 kHz sine wave. OUTPUT CURRENT SETTLING TIME All 0.6 — µs typ To 0.01% of full-scale range. OUT 1 Load = 100 Ω, C EXT = 13 pF. Digital Inputs = 0 V to VDD or VDD to 0 V. OUTPUT CAPACITANCE COUT1 (Pin 1) All 200 200 pF max Digital Inputs COUT2 (Pin 2) All 70 70 pF max = VIH COUT1 (Pin 1) All 70 70 pF max Digital Inputs COUT2 (Pin 2) All 200 200 pF max = VIL NOTES 1Temperature range as follows: J, K versions, 0 °C to +70°C; A, B versions, –25°C to +85°C; S, T versions, –55°C to +125°C. 2Guaranteed by design but not production tested. 3To minimize feedthrough in the ceramic package (Suffix D) the user must ground the metal lid. Specifications subject to change without notice. (VDD = +15 V, VREF = +10 V; OUT 1 = OUT 2 = GND = 0 V unless otherwise noted) |
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