CD4096BMS datasheet(7/10 Pages) INTERSIL

Part #	CD4096BMS

Description	CMOS Gated J-K Master-Slave Flip-Flops

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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7 / 10 page

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CD4095BMS, CD4096BMS

Logic Diagram

FIGURE 1. CD4095BMS AND CD4096BMS LOGIC DIAGRAM

TRUTH TABLES

SYNCHRONOUS OPERATION

(S = 0, R = 0)

ASYNCHRONOUS OPERATION

(J AND K = Don’t Care)

INPUTS BEFORE POSITIVE

CLOCK TRANSITION

OUTPUTS AFTER POSITIVE

CLOCK TRANSITION

INPUTS BEFORE POSITIVE

CLOCK TRANSITION

OUTPUTS AFTER POSITIVE

CLOCK TRANSITION

J*

K*

Q

QS

R

Q

0

1

0

1

0

1

No Change

0

1

Toggles

No Change

1

0

Toggles

0

1

0

1

0

1

No Change

0

1

0

No Change

1

0

* For CD4095BMS

J = J1

• J2 • J3

K = K1

• K2 • K3

For CD4096BMS

J = J1

• J2 • J3

K = K1

• K2 • K3

0 = VSS, 1 = VDD

*ALL INPUTS ARE PROTECTED

BY CMOS PROTECTION

NETWORK

VDD

VSS

J1

*

3

J2

*

4

*

5

FOR

*

5

K1

*

11

K2

*

10

*

9

*

9

TG

CL

2

CL

1

TG

CL

2

CL

1

CL

2

CL

1

TG

CL

2

CL

1

TG

CD4095BMS

J3

FOR

CD4096BMS

J3

FOR

CD4095BMS

J3

FOR

CD4096BMS

J3

SET

*

13

Q

6

Q

8

RESET

*

2

CLOCK

*

12

CL

TG

2

1

OUT

IN

TRANSMISSION GATE

INPUT TO OUTPUT IS:

a) A BIDIRECTIONAL LOW

IMPEDANCE WHEN CONTROL INPUT 1

IS “LOW” AND CONTROL INPUT 2 IS “HIGH”

b) AN OPEN CIRCUIT WHEN CONTROL INPUT 1

IS “HIGH” AND CONTROL INPUT 2 IS “LOW”

Similar Part No. - CD4096BMS

Manufacturer	Part #	Datasheet	Description
Texas Instruments	CD4093	574Kb / 12P	[Old version datasheet] CMOS QUAD 2-INPUT NAND SCHMITT TRIGGERS
Fairchild Semiconductor	CD4093	89Kb / 8P	Quad 2-Input NAND Schmitt Trigger
Texas Instruments	CD4093B	574Kb / 12P	[Old version datasheet] CMOS QUAD 2-INPUT NAND SCHMITT TRIGGERS
Texas Instruments	CD4093B	978Kb / 17P	[Old version datasheet] CMOS Quad 2-Input NAND Schmitt Triggers
Silicon Supplies	CD4093B	693Kb / 6P	CMOS High Voltage Logic

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Similar Description - CD4096BMS

Manufacturer	Part #	Datasheet	Description
Micro Electronics	MMC4095	153Kb / 5P	GATED J-K MASTER SLAVE FLIP FLOPS
STMicroelectronics	HCC4095B	295Kb / 13P	GATE J-K MASTER-SLAVE FLIP-FLOPS
Texas Instruments	SN54110	169Kb / 3P	[Old version datasheet] AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH DATA LOCKOUT
	SN5472	124Kb / 4P	[Old version datasheet] AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR
	SN5472	326Kb / 9P	[Old version datasheet] AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR
IK Semicon Co., Ltd	IN7472	244Kb / 5P	AND-Gated J-K Master-Slave Flip- Flops with Reset and Clear
Integral Corp.	IN7472	242Kb / 5P	AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear
KODENSHI_AUK CORP.	KK7472	259Kb / 5P	AND-Gated J-K Master-Slave Flip- Flops with Reset and Clear
Texas Instruments	CD4027B	1Mb / 27P	[Old version datasheet] CMOS Dual J-K Master-Slave Flip-Flop
Texas Instruments	CD4027B	676Kb / 14P	[Old version datasheet] CMOS Dual J-K Master-Slave Flip-Flop

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CD4096BMS Datasheet(PDF) 7 Page - Intersil Corporation

CD4096BMS Datasheet(HTML) 7 Page - Intersil Corporation

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