AD8318_15 datasheet(10/24 Pages) AD

Part #	AD8318

Description	1 MHz to 8 GHz, 70 dB Logarithmic Detector/Controller

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Manufacturer	AD [Analog Devices]

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AD8318

Rev. B | Page 10 of 24

j2

–j2

j0.5

–j0.5

j0.2

–j0.2

00.2

0.5

1

START FREQUENCY = 0.1GHz

STOP FREQUENCY = 8GHz

j1

–j1

5.8GHz

8GHz

3.6GHz

2.2GHz

1.9GHz

0.9GHz

0.1GHz

2

Figure 16. Input Impedance vs. Frequency; No Termination Resistor on

INHI, ZO = 50 Ω

0.07

0

0.01

0.02

0.03

0.04

0.05

0.06

1.41.51.61.7

VENBL (V)

1.8

DECREASING VENBL

INCREASING VENBL

Figure 17. Supply Current vs. Enable Voltage

20ns PER HORIZONTAL DIVISION

VOUT

GND

200mV/VERTICAL

DIVISION

PULSED RF INPUT 0.1GHz,

–10dBm

Figure 18. VOUT Pulse Response Time; Pulsed RF Input 0.1 GHz, –10 dBm;

CLPF = Open

10k

1k

100

10

1

3

10

30

100

300

1k

3k

10k

FREQUENCY (kHz)

–40dBm

–20dBm

–10dBm

0dBm

RF OFF

–60dBm

Figure 19. Noise Spectral Density of Output; CLPF = Open

1k

100

10

1

3

10

30

100

300

1k

3k

10k

FREQUENCY (kHz)

Figure 20. Noise Spectral Density of Output Buffer (from CLPF to VOUT);

CLPF = 0.1 μF

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

–65

–55

–45

–35

–25

–15

–5

5

15

PIN (dBm)

2.0

–2.0

–1.6

–1.2

–0.8

–0.4

0

0.4

0.8

1.2

1.6

Figure 21. Output Voltage Stability vs. Supply Voltage at 1.9 GHz

When VP Varies by 10%, Multiple Devices

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