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HCTS299HMSR Datasheet(PDF) 1 Page - Intersil Corporation

Part # HCTS299HMSR
Description  Radiation Hardened 8-Bit Universal Shift Register; Three-State
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HCTS299HMSR Datasheet(HTML) 1 Page - Intersil Corporation

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright
© Intersil Corporation 1999
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
S0
OE1
OE2
I/O6
I/O4
I/O2
Q0
I/O0
MR
GND
VCC
DS7
Q7
I/O7
S1
I/O5
I/O3
I/O1
CP
DS0
2
3
4
5
6
7
8
120
19
18
17
16
15
14
13
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
9
10
12
11
MR
GND
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS299DMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead SBDIP
HCTS299KMSR
-55oC to +125oC
Intersil Class S Equivalent
20 Lead Ceramic Flatpack
HCTS299D/Sample
+25oC
Sample
20 Lead SBDIP
HCTS299K/Sample
+25oC
Sample
20 Lead Ceramic Flatpack
HCTS299HMSR
+25oC
Die
Die
HCTS299MS
Radiation Hardened
8-Bit Universal Shift Register; Three-State
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
-Bus Driver Outputs: 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii
≤ 5µA at VOL, VOH
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
August 1995
Spec Number
518640
File Number
3069.1


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