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HD-4702 Datasheet(PDF) 4 Page - Intersil Corporation |
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HD-4702 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 8 page 4 Supply Current (Static) ICC ECP = VCC, CP = 0V, VCC = 5.5V All Other Inputs = GND, (Note 5) 1, 2, 3 -55 ≤ TA ≤ 125 - 1500 µA ECP = VCC, CP = 0V, VCC = 5.5V All Other Inputs = VCC (Note 5) 1, 2, 3 -55 ≤ TA ≤ 125 - 1000 µA NOTES: 4. Interchanging of force and sense conditions is permitted. 5. Input Current and Quiescent Power Supply Current are relatively higher for this device because of active pull-up circuits on all inputs except IX. TABLE 2. AC ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested. AC PARAMETER SYMBOL CONDITIONS GROUP A SUBGROUPS TEMPERATURE (oC) MIN MAX UNITS Propagation Delay, IX to CO tPLH VCC = 4.5V CL ≤ 7pF on OX CL = 50pF (Note 6) 9, 10, 11 -55 ≤ TA ≤ 125 - 350 ns Propagation Delay, IX to CO tPHL 9, 10, 11 -55 ≤ TA ≤ 125 - 275 ns Propagation Delay, CP to CO tPLH 9, 10, 11 -55 ≤ TA ≤ 125 - 260 ns Propagation Delay, CP to CO tPHL 9, 10, 11 -55 ≤ TA ≤ 125 - 220 ns Propagation Delay, CO to Qn tPLH 9, 10, 11 -55 ≤ TA ≤ 125 - (Note 7) ns Propagation Delay, CO to Qn tPHL 9, 10, 11 -55 ≤ TA ≤ 125 - (Note 7) ns Propagation Delay, CO to Z tPLH 9, 10, 11 -55 ≤ TA ≤ 125 - 85 ns Propagation Delay, CO to Z tPHL 9, 10, 11 -55 ≤ TA ≤ 125 - 75 ns Output Transition Time (Except OX)tTLH 9, 10, 11 -55 ≤ TA ≤ 125 160 ns Output Transition Time (Except OX)tTHL 9, 10, 11 -55 ≤ TA ≤ 125 - 75 ns Set-UpTime Select to CO tS 9, 10, 11 -55 ≤ TA ≤ 125 350 - ns Hold Time, Select to CO tH 9, 10, 11 -55 ≤ TA ≤ 125 0 - ns Set-UpTime, IM to CO tS 9, 10, 11 -55 ≤ TA ≤ 125 350 - ns Hold Time, IM to CO tH 9, 10, 11 -55 ≤ TA ≤ 125 0 - ns Minimum Clock Pulse Width, Low (Notes 8, 9) tWCP(L) 9, 10, 11 -55 ≤ TA ≤ 125 120 ns Minimum Clock Pulse Width, High (Notes 8, 9) tWCP(H) 9, 10, 11 -55 ≤ TA ≤ 125 120 - ns Minimum IX Pulse Width, Low (Note 9) tWCP(L) 9, 10, 11 -55 ≤ TA ≤ 125 160 - ns Minimum IX Pulse Width, High (Note 9) tWCP(H) 9, 10, 11 -55 ≤ TA ≤ 125 160 - ns NOTES: 6. Propagation Delays (tPLH and tPHL) and Output Transition Times (tTLH and tTHL) will change with Output Load Capacitance (CL). Set-Up Times (tS), Hold Times (tH), and Minimum Pulse Widths (tW) do not vary with load capacitance. 7. For multichannel operation, Propagation Delay (CO to Qn), plus Set-Up Time, Select to CO, is guaranteed to be ≤ 367ns. 8. The first High Level Clock Pulse alter ECP goes Low must be at least 350ns long to guarantee reset of all Counters. 9. It is recommended that input rise and fall times to the clock inputs (CP, IX) be less than 15ns. TABLE 1. DC ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) Device Guaranteed and 100% Tested DC PARAMETER SYMBOL CONDITIONS GROUP A SUB- GROUPS TEMPERATURE (oC) MIN MAX UNITS HD-4702/883 |
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