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AD9861 Datasheet(PDF) 5 Page - Analog Devices |
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AD9861 Datasheet(HTML) 5 Page - Analog Devices |
5 / 52 page AD9861 Rev. 0 | Page 5 of 52 POWER SPECIFICATIONS Table 3. AD9861-50 and AD9861-80 Analog and digital supplies = 3.3 V; FCLKIN = 50 MHz; PLL 4× setting; normal timing mode Parameter Temp Test Level Min Typ Max Unit POWER SUPPLY RANGE Analog Supply Voltage (AVDD) Full IV 2.7 3.6 V Digital Supply Voltage (DVDD) Full IV 2.7 3.6 V Driver Supply Voltage (DRVDD) Full IV 2.7 3.6 V ANALOG SUPPLY CURRENTS TxPath (20 mA Full-Scale Outputs) Full V 70 mA TxPath (2 mA Full-Scale Outputs) Full V 20 mA Rx Path (-80, at 80 MSPS) Full V 165 mA RxPath (-80, at 40 MSPS, Low Power Mode) Full V 82 mA RxPath (-80, at 20 MSPS, Ultralow Power Mode) Full V 35 mA Rx Path (-50, at 50 MSPS) Full V 103 mA RxPath (-50, at 50 MSPS, Low Power Mode) Full V 69 mA RxPath (-50, at 16 MSPS, Ultralow Power Mode) Full V 28 mA TxPath, Power-Down Mode Full V 2 mA RxPath, Power-Down Mode Full V 5 mA PLL Full V 12 mA DIGITAL SUPPLY CURRENTS TxPath, 1× Interpolation, 50 MSPS DAC Update for Both DACs, Half-Duplex 24 Mode Full V 20 mA TxPath, 2× Interpolation, 100 MSPS DAC Update for Both DACs, Half-Duplex 24 Mode Full V 50 mA TxPath, 4× Interpolation, 200 MSPS DAC Update for Both DACs, Half-Duplex 24 Mode Full V 80 mA RxPath Digital, Half-Duplex 24 Mode Full V 15 mA DIGITAL SPECIFICATIONS Table 4. AD9861-50 and AD9861-80 Parameter Temp Test Level Min Typ Max Unit LOGIC LEVELS Input Logic High Voltage, VIH Full IV DRVDD – 0.7 V Input Logic Low Voltage, VIL Full IV 0.4 V Output Logic High Voltage, VOH (1 mA Load) Full IV DRVDD – 0.6 V Output Logic Low Voltage, VOL (1 mA Load) Full IV 0.4 V DIGITAL PIN Input Leakage Current Full IV 12 µA Input Capacitance Full IV 3 pF Minimum RESET Low Pulse Width Full IV 5 Input Clock Cycles Digital Output Rise/Fall Time Full IV 2.8 4 ns |
Similar Part No. - AD9861_15 |
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Similar Description - AD9861_15 |
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