HIP6004BCB datasheet(11/12 Pages) INTERSIL

Part #	HIP6004BCB

Description	Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor

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Manufacturer	INTERSIL [Intersil Corporation]

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Figure 10 shows the upper gate drive supplied by a direct

connection to VCC. This option should only be used in

converter systems where the main input voltage is +5VDC or

less. The peak upper gate-to-source voltage is approximately

VCC less the input supply. For +5V main power and +12VDC

for the bias, the gate-to-source voltage of Q1 is 7V. A logic-

level MOSFET is a good choice for Q1 and a logic-level

MOSFET can be used for Q2 if its absolute gate-to-source

voltage rating exceeds the maximum voltage applied to VCC.

Schottky Selection

Rectifier D2 is a clamp that catches the negative inductor

swing during the dead time between turning off the lower

MOSFET and turning on the upper MOSFET. The diode

must be a Schottky type to prevent the lossy parasitic

MOSFET body diode from conducting. It is acceptable to

omit the diode and let the body diode of the lower MOSFET

clamp the negative inductor swing, but efficiency will drop

one or two percent as a result. The diode’s rated reverse

breakdown voltage must be greater than the maximum

input voltage.

+12V

PGND

HIP6004B

GND

LGATE

UGATE

PHASE

BOOT

VCC

+5V OR +12V

NOTE:

VG-S ≈ VCC

CBOOT

DBOOT

Q1

Q2

+

-

FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION

VG-S ≈ VCC -VD

D2

+ VD -

+12V

PGND

HIP6004B

GND

LGATE

UGATE

PHASE

BOOT

VCC

+5V OR LESS

NOTE:

VG-S ≈ VCC

Q1

Q2

+

-

FIGURE 10. UPPER GATE DRIVE - DIRECT VCC DRIVE OPTION

VG-S ≈ VCC -5V

D2

HIP6004B

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