8

Soft-Start Circuit

Soft-Start into Sleep States (S3, S4/S5)

The 5VSB POR function initiates the soft-start sequence. An

internal 10

µA current source charges an external capacitor

to 5V. The error amplifiers reference inputs are clamped to a

level proportional to the SS (Soft-Start) pin voltage. As the

SS pin voltage slews from about 1.25V to 2.5V, the input

clamp allows a rapid and controlled output voltage rise.

Figure 9 shows the soft-start sequence for the typical

application start-up in a sleep state with all output voltages

charge circuit quickly raises the SS capacitor voltage to

approximately 1V. At this point, the 10

µA current source

continues the charging up to T2, where a voltage of 1.25V

(typically) is reached and an internal clamp limits further

charging. Clamping of the soft-start voltage (T2 to T3

interval) should only be noticed with capacitors smaller than

0.1

µF; soft-start capacitors of 0.1µF and above should

present a soft-start ramp void of this plateau. At time T3,

voltage selection is latched in and the charging of the soft-

start capacitor resumes, using the 10

µA current source. At

this point, the error amplifiers’ reference inputs are starting

their transitions, causing the output voltages to ramp up

proportionally. The ramping continues until time T4 when all

the voltages reach the set value. At time T5, when the soft-

start capacitor value reaches approximately 2.8V, the under-

voltage monitoring circuits are activated and the soft-start

capacitor is quickly discharged down to the value attained at

time T2 (approximately 1.25V).

EN3VDL = 0, EN5VDL = 1

EN3VDL = 0, EN5VDL = 0

5VSB

12V

S3

S5

5VDLSB

DLA

3V3DLSB

3V3DL

5VDL

5VSB

12V

S3

S5

5VDLSB

DLA

3V3DLSB

3V3DL

5VDL

5VSB

12V

S3

S5

DRV2

VSEN2

VSEN2

INTERNAL

DEVICE

FIGURE 9. SOFT-START INTERVAL IN A SLEEP STATE (ALL

OUTPUTS ENABLED)

0V

0V

TIME

SOFT-START

(1V/DIV)

OUTPUT

(1V/DIV)

VOLTAGES

T1 T2 T3

T0

5VSB

(1V/DIV)

UV DETECT ENABLE

(LOGIC LEVEL)

T5

T4

HIP6501A