3

Absolute Maximum Ratings

Thermal Information

Input or Output Voltage

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2

Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2500 Gates

Thermal Resistance

DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250mW

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mW

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Operating Conditions

Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +3.0V to +5.5V

Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +0.8V

Input Rise and Fall Time

CMOS Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns Max

CMOS Schmitt Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . .Unlimited

Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Current

Operating Current

CLK = 2.0 MHz

-

1.0

5.0

mA

Power-Down Mode (Note 1)

PD = 1

-

50

150

µA

Clock Stopped (Note 2)

-

5.0

50

µA

Input High Voltage

CMOS Level (SIN, STAT, RDY, TEST)

V

Schmitt Trigger (RESET, CLK, VPWIN)

V

Input Low Voltage

CMOS Level (SIN, STAT, RDY, TEST)

-

V

Schmitt Trigger (RESET, CLK, VPWIN)

-

V

High Level Input Current

(CLK, VPWIN, RESET)

-1

0.001

1

µA

Input Buffer with Pull-Down (SIN, TEST, STAT, RDY)

100

200

500

µA

Low Level Input Current

(CLK, VPWIN, RESET)

-1

-0.001

1

µA

Input Buffer with Pull-Down (SIN, TEST, STAT, RDY)

-10

-0.01

10

µA

Output High Voltage

(SCK, SOUT, VPWOUT, IDLE, SACTIVE)

-

-

V

Output Low Voltage

(SCK, SOUT, VPWOUT, IDLE, SACTIVE)

-

-

0.4

V

High Impedance Leakage Current

Three-State with Pull-Down (SCK, SOUT)

100

200

500

µA

-10

10

µA

Schmitt Trigger Hysteresis Voltage

(RESET, CLK, VPWIN)

0.2

0.5

2.0

V

NOTES:

HIP7010