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HIP7030A2M Datasheet(PDF) 9 Page - Intersil Corporation

Part # HIP7030A2M
Description  J1850 8-Bit 68HC05 Microcontroller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP7030A2M Datasheet(HTML) 9 Page - Intersil Corporation

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9
Functional Pin Description
This section provides a description of each of the 28 pins of
the HIP7030A2 MCU.
VDD and VSS (Power)
Power is supplied to the MCU using these two pins. VDD is
connected to the positive supply and VSS is connected to
the negative supply.
IRQ (Maskable Interrupt Request - Input)
The IRQ pin is negative edge-sensitive triggering. A high to
low transition on the IRQ pin will produce an interrupt.
In the event of an interrupt request, the MCU always com-
pletes the current instruction before it responds to the
request. An internal mask can be used to inhibit the MCU
from responding to IRQ interrupts.
An IRQ interrupt is generated if the IRQ pin is pulled low for
at least one tILIH. The occurrence of the low going pulse is
registered in a flip-flop and the IRQ interrupt will be recog-
nized even if the IRQ pin has returned to a high state before
the interrupt can be serviced.
Once the edge-sensitive flip-flop is cleared, (it is automati-
cally cleared at the start of the interrupt service routine) the
interrupt request is removed until the IRQ pin returns to a
high level and once again goes low.
See
INTERRUPTS for more details concerning IRQ inter-
rupts.
RESET (Master Reset - Input)
The HIP7030A2 contains an integrated Power-On Reset
(POR) circuit and the RESET input is therefore not required
for start-up. It can be used to reset the MCU internal state
and provides for an orderly re-start of the software after ini-
tial power-up. Refer to
Resets for a detailed description of
POR and RESET.
TCAP (Timer Capture - Input)
The TCAP input controls the input capture feature for the on-
chip programmable timer system. The TCAP input is also
used as the strobe signal to the Port D strobed outputs.
Refer to
Input Capture Register and PD0, PD1 Strobed Out-
put Mode for additional information.
TCMP (Timer Compare - Output)
The TCMP pin provides an output for the output compare
feature of the on-chip timer system. Refer to
Output Com-
pare Register for additional information.
OSCIN (Oscillator Input - Input),
OSCOUT (Oscillator Output - Output),
OSCB (Oscillator Buffered Output - Output)
OSCIN is the input and OSCOUT is the output of an
inverter/amplifier which can be used to build either a quartz
crystal or ceramic resonator based clock oscillator. Alterna-
tively, the OSCIN input can be driven from any external clock
source which satisfies the CMOS Schmitt trigger input level
requirements of the OSCIN pin. See
Electrical Specifications
for input level specification.
NOTE:
1. Measurement points are VOL, VOH, VIL and VIH.
FIGURE 3H. SPI SLAVE TIMING CPOL = 1, CPHA = 0
Serial Peripheral Interface (SPI) Timing Diagrams (Continued)
SS
(INPUT)
SCK
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
D7O
D7I
D6O
D0O
D6I
D0I
(2)
(5)
(4)
(10)
(11)
(8)
(1)
(12)
(13)
(3)
(9)
(7)
(6)
HIP7030A2


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