ADG3123

Data Sheet

Rev. B | Page 10 of 12

THEORY OF OPERATION

The ADG3123 is an 8-channel, noninverting CMOS to high

process, the device is capable of operating at high supply

voltages while maintaining ultralow power consumption.

sets the low logic levels for all outputs and the high logic levels

level for the Y1 to Y6 outputs.

The device translates the CMOS logic levels applied to the A1 to

A8 inputs into high voltage bipolar levels available on the Y side

of the device at Pin Y1 to Pin Y8.

INPUT DRIVING REQUIREMENTS

The ADG3123 design ensures low input capacitance and leakage

current thereby reducing the loading of the circuit that drives the

input pins (Pin A1 to Pin A8) to a minimum. Its input threshold

levels are compliant with JEDEC standards for drivers operated

from supply voltages between 2.3 V and 5.5 V. It is recommended

that the inputs of any unused channel be tied to a stable logic

level (low or high).

OUTPUT LOAD REQUIREMENTS

The low output impedance of the ADG3123 allows each channel

to drive both resistive and capacitive loads. The maximum load

current is limited by the current carrying capability of any given

channel. If more channels are used, the maximum load current

per channel is reduced accordingly. Note that the sum of the

load currents on all channels should never exceed the absolute

maximum ratings specifications.

determined using the formulas shown in the Capacitive Loads

and the Resistive Loads sections.

Capacitive Loads

where:

Resistive Loads

L

SS

DDX

CHANNEL

R

V

D

V

D

A

I

×

−

+

×

=

)

1

(

)

(

where:

D is the duty cycle of the input signal. D is defined as the ratio

between the high state duration of the signal and its period.

POWER SUPPLIES

The ADG3123 operates from a dual-supply voltage. As good

design practice for all CMOS devices dictates, power up the

To ensure optimum performance, use decoupling capacitors on

all power supply pins. Furthermore, good engineering and layout

practice suggests placing these capacitors as close as possible to

the package supply pins.