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HSP45102SC-40 Datasheet(PDF) 6 Page - Intersil Corporation |
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HSP45102SC-40 Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 7 page 3-200 AC Test Load Circuit AC Electrical Specifications VCC = 5.0V ±5%, TA = 0 oC to 70oC, T A = -40 oC to 85oC (Note 5) PARAMETER SYMBOL NOTES -33 (33MHz) -40 (40MHz) UNITS MIN MAX MIN MAX Clock Period tCP 30 - 25 - ns Clock High tCH 12 - 10 - ns Clock Low tCL 12 - 10 - ns SCLK High/Low tSW 12 - 10 - ns Setup Time SD to SCLK Going High tDS 12 - 12 - ns Hold Time SD from SCLK Going High tDH 0-0- ns Setup Time SFTEN, MSB/LSB to SCLK Going High tMS 15 - 12 - ns Hold Time SFTEN, MSB/LSB from SCLK Going High tMH 0-0- ns Setup Time SCLK High to CLK Going High tSS Note 6 16 - 15 - ns Setup Time P0-1 to CLK Going High tPS 15 - 12 - ns Hold Time P0-1 from CLK Going High tPH 1-1- ns Setup Time LOAD, TXFR, ENPHAC, SEL_L/M to CLK Going High tES 15 - 13 - ns Hold Time LOAD, TXFR, ENPHAC, SEL_L/M from CLK Going High tEH 1-1- ns CLK to Output Delay tOH 2 15 2 13 ns Output Rise, Fall Time tRF Note 7 8 - 8 - ns NOTES: 5. AC testing is performed as follows: Input levels (CLK Input) 4.0V and 0V; Input levels (all other inputs) 0V and 3.0V; Timing reference levels (CLK) 2.0V; All others 1.5V. Output load per test load circuit with switch closed and CL = 40pF. Output transition is measured at VOH > 1.5V and VOL < 1.5V. 6. If TXFR is active, care must be taken to not violate setup and hold times as data from the shift registers may not have settled before CLK occurs. 7. Controlled via design or process parameters and not directly tested. Characterized upon initial design and after major process and/or design changes. EQUIVALENT CIRCUIT CL (NOTE) IOH 1.5V IOL DUT SWITCH S1 OPEN FOR ICCSB AND ICCOP S1 ± NOTE: Test head capacitance. HSP45102 |
Similar Part No. - HSP45102SC-40 |
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Similar Description - HSP45102SC-40 |
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