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ICL7660SCPA Datasheet(PDF) 5 Page - Intersil Corporation |
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ICL7660SCPA Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 9 page 3-40 Detailed Description The ICL7660S contains all the necessary circuitry to complete a negative voltage converter, with the exception of 2 external capacitors which may be inexpensive 10 µF polarized electrolytic types. The mode of operation of the device may be best understood by considering Figure 13, which shows an idealized negative voltage converter. Capacitor C1 is charged to a voltage, V+, for the half cycle when switches S1 and S3 are closed. (Note: Switches S2 and S4 are open during this half cycle.) During the second half cycle of operation, switches S2 and S4 are closed, with S1 and S3 open, thereby shifting capacitor C1 to C2 such that the voltage on C2 is exactly V+, assuming ideal switches and no load on C2. The ICL7660S approaches this ideal situation more closely than existing non-mechanical circuits. In the ICL7660S, the 4 switches of Figure 13 are MOS power switches; S1 is a P-Channel devices and S2, S3 and S4 are N-Channel devices. The main difficulty with this approach is that in integrating the switches, the substrates of S3 and S4 must always remain reverse biased with respect to their sources, but not so much as to degrade their “ON” resistances. In addition, at circuit start up, and under output short circuit conditions (VOUT = V+), the output voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this would result in high power losses and probable device latchup. This problem is eliminated in the ICL7660S by a logic network which senses the output voltage (VOUT) together with the level translators, and switches the substrates of S3 and S4 to the correct level to maintain necessary reverse bias. The voltage regulator portion of the ICL7660S is an integral part of the anti-latchup circuitry, however its inherent voltage drop can degrade operation at low voltages. Therefore, to improve low voltage operation “LV” pin should be connected to GND, disabling the regulator. For supply voltages greater than 3.5V the LV terminal must be left open to insure latchup proof operation, and prevent device damage. Theoretical Power Efficiency Considerations In theory a voltage converter can approach 100% efficiency if certain conditions are met: 1. The drive circuitry consumes minimal power. 2. The output switches have extremely low ON resistance and virtually no offset. 3. The impedance of the pump and reservoir capacitors are negligible at the pump frequency. FIGURE 11. OUTPUT SOURCE RESISTANCE AS A FUNCTION OF OSCILLATOR FREQUENCY NOTE: 7. These curves include in the supply current that current fed directly into the load RL from the V+ (See Figure 12). Thus, approximately half the supply current goes directly to the positive side of the load, and the other half, through the ICL7660S, to the negative side of the load. Ideally, VOUT ∼ 2VIN, IS ∼ 2IL, so VIN x IS ∼ VOUT x IL. Typical Performance Curves (Test Circuit Figure 12) (Continued) 400 300 200 100 0 100 1k 10k 100k OSCILLATOR FREQUENCY (Hz) V+ = 5V TA = 25 oC I = 10mA C1 = C2 = 10 µF C1 = C2 = 1 µF C1 = C2 = 100 µF 1 2 3 4 8 7 6 5 + - C1 10 µF IS V+ (+5V) IL RL -VOUT C2 10 µF ICL7660S V+ + - NOTE: For large values of COSC (>1000pF) the values of C1 and C2 should be increased to 100 µF. FIGURE 12. ICL7660S TEST CIRCUIT ICL7660S |
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Similar Description - ICL7660SCPA |
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