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ADN2848 Datasheet(PDF) 8 Page - Analog Devices |
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ADN2848 Datasheet(HTML) 8 Page - Analog Devices |
8 / 12 page ADN2848 Data Sheet Rev. B | Page 8 of 12 Example: mA 45 mA 50 = = DEGRADE FAIL I so I μA 500 100 mA 50 100 = = = FAIL ASET I I k Ω 4 . 2 μA 500 2 . 1 V 2 . 1 * = = = ASET ASET I R *The smallest valid value for RASET is 1.2 kΩ, because this corresponds to the maximum IBIAS of 100 mA. The laser degrade alarm, DEGRADE, is provided to give a warning of imminent laser failure if the laser diode degrades further or if environmental conditions such as increasing temperature continue to stress the LD. The laser fail alarm, FAIL, is activated when the transmitter can no longer be guaranteed to be SONET/SDH compliant. This occurs when one of the following conditions arise: • The ASET threshold is reached. • The ALS pin is set high. This shuts off the modulation and bias currents to the LD, resulting in the MPD current dropping to zero. This gives closed-loop feedback to the system that ALS has been enabled. DEGRADE is raised only when the bias current exceeds 90% of ASET current. MONITOR CURRENTS IBMON, IMMON, and IMPDMON are current controlled current sources from VCC. They mirror the bias, modulation, and MPD current for increased monitoring functionality. An external resistor to GND gives a voltage proportional to the current monitored. If the monitoring function IMPDMON is not required, the IMPD pin must be grounded and the monitor photodiode output must be connected directly to the PSET pin. DATA AND CLOCK INPUTS Data and clock inputs are ac-coupled (10 nF capacitors recommended) and terminated via a 100 Ω internal resistor between DATAP and DATAN and also between the CLKP and CLKN pins. There is a high impedance circuit to set the common-mode voltage, which is designed to allow for maximum input voltage headroom over temperature. It is necessary that ac coupling be used to eliminate the need for matching between common-mode voltages. ADN2848 TO FLIP-FLOPS 50Ω 50Ω VREG R R = 2.5kΩ, DATA R = 3kΩ, CLK 400µA TYP DATAP DATAN Figure 5. AC Coupling of Data Inputs For input signals that exceed 500 mV p-p single-ended, it is necessary to insert an attenuation circuit as shown in Figure 6. DATAP/CLKP DATAN/CLKN R3 R1 R2 RIN ADN2848 NOTE THAT RIN = 100Ω = THE DIFFERENTIAL INPUT IMPEDANCE OF THE ADN2848. Figure 6. Attenuation Circuit CCBIAS When the laser is used in ac-coupled mode, the CCBIAS pin and the IBIAS pin are tied together (see Figure 9). In dc-coupled mode, CCBIAS is tied to VCC. IBIAS To achieve optimum optical eye quality, a pull-up resistor RZ, as shown in Figure 8 and Figure 9, is required. The recommended RZ value is approximately 200 Ω ~ 500 Ω. AUTOMATIC LASER SHUTDOWN The ADN2848 ALS allows compliance to ITU-T-G958 (11/94), section 9.7. When ALS is logic high, both the bias and the modulation currents are turned off. Correct operation of ALS is confirmed by the FAIL alarm being raised when ALS is asserted. Note that this is the only time that DEGRADE is low while FAIL is high. ALARM INTERFACES The FAIL and DEGRADE outputs have an internal 30 kΩ pull- up resistor that is used to pull the digital high value to VCC. However, the alarm output can be overdriven with an external resistor, allowing alarm interfacing to non-VCC levels. Non-VCC alarm output levels must be below the VCC used for the ADN2848. |
Similar Part No. - ADN2848_15 |
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Similar Description - ADN2848_15 |
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