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ISL6225CA-T Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL6225CA-T Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 19 page 10 FN9049.7 December 28, 2004 The hysteretic comparator initiates the PWM signal when the output voltage gets below the lower threshold and terminates the PWM signal when the output voltage rises above the upper threshold. A spread or hysteresis between these two thresholds determines the switching frequency and the peak value of the inductor current. The transition to constant frequency CCM mode happens when the inductor current increases above the critical value: Where, ∆Vhys= 15mV, is a hysteretic comparator window, ESR is the equivalent series resistance of the output capacitor. Because of different control mechanisms, the value of the load current where transition into CCM operation takes place is usually higher compared to the load level at which transition into hysteretic mode had occurred. VOUT pin and Forced Continuous Conduction Mode (FCCM) The controller has the flexibility to operate a converter in fixed-frequency constant conduction mode (CCM), or in hysteretic mode. Connecting the VOUT pin to GND will inhibit hysteretic mode; this is called forced constant conduction mode (FCCM). Connecting the VOUT pin to the converter output will allow transition between CCM mode and hysteretic mode. When the VOUT pin is connected to the converter output, a circuit is activated that smooths the transition from hysteretic mode to CCM mode. While in hysteretic mode, this circuit prepositions the PWM error amplifier output to a level close to that needed to provide the appropriate PWM duty cycle required for regulation. This is a much more desirable state for the PWM error amplifier at mode transition, as opposed to being in saturation which requires a period of time to slew to the required level. Such dual function of the VOUT pin enhances applicability of the controller and allows for lower pin count. Feedback Loop Compensation To reduce the number of external components and remove the burden of determining compensation components from a system designer, both PWM controllers have internally compensated error amplifiers. To make internal compensation possible several design measures where taken. First, the ramp signal applied to the PWM comparator is proportional to the input voltage provided via the VIN pin. This keeps the modulator gain constant when the input voltage varies. Second, the load current proportional signal is derived from the voltage drop across the lower MOSFET during the PWM time interval and is added to the amplified error signal on the comparator input. This effectively creates an internal current control loop. The resistor connected to the ISEN pin sets the gain in the current feedback loop. The following expression estimates the required value of the current sense resistor depending on the maximum load current and the value of the MOSFET’s rDS(ON). Due to implemented current feedback, the modulator has a single pole response with -1 slope at a frequency determined by the load, where: Ro is load resistance and Co is load capacitance. For this type of modulator, a Type 2 compensation circuit is usually sufficient. Figure 7 shows a Type 2 amplifier and its response along with the responses of the current mode modulator and the converter. The Type 2 amplifier, in addition to the pole at origin, has a zero-pole pair that causes a flat gain region at frequencies between the zero and the pole: ; This region is also associated with phase ‘bump’ or reduced phase shift. The amount of phase shift reduction depends on how wide the region of flat gain is and has a maximum value of 90o. To further simplify the converter compensation, the modulator gain is kept independent of the input voltage variation by providing feed-forward of VIN to the oscillator ramp. ICCM ∆Vhys 2ESR • ---------------------- ≈ RCS IMAX rDS ON () ⋅ 75 µA ---------------------------------------------- 100Ω – = FPO 1 2 π RO CO ⋅⋅ ---------------------------------- = FZ 1 2 π R2 C1 ⋅⋅ ------------------------------- 6kHz == FP 1 2 π R1 C2 ⋅⋅ ------------------------------- 600kHz == FIGURE 7. FEEDBACK LOOP COMPENSATION R1 R2 C1 C2 FPO FZ FP FC MODULATOR EA TYPE 2 EA GEA = 14dB GM = 18dB CONVERTER ISL6225 |
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