ADV7195_15 datasheet(3/36 Pages) AD

Part #	ADV7195

Description	Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs and 10-Bit Data Input

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Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

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3 / 36 page

REV. A

–3–

ADV7195

ADAPTIVE FILTER THRESHOLD A . . . . . . . . . . . . . . . 23

AFTA AFTA7–0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

ADAPTIVE FILTER THRESHOLD B . . . . . . . . . . . . . . . 23

AFTB AFTB7–0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

ADAPTIVE FILTER THRESHOLD C . . . . . . . . . . . . . . . 23

AFTC AFTC7–0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

SHARPNESS FILTER AND ADAPTIVE FILTER

APPLICATIONS EXAMPLES . . . . . . . . . . . . . . . . . . . . 24

Sharpness Filter Application . . . . . . . . . . . . . . . . . . . . . . 24

Adaptive Filter Control Application . . . . . . . . . . . . . . . . . 25

HDTV MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

MODE REGISTER 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

MR0 (MR07–MR00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

MR0 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 26

Output Standard Selection (MR00-MR01) . . . . . . . . . . . 26

Input Control Signals (MR02–MR03) . . . . . . . . . . . . . . . 26

Reserved (MR04) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Input Standard (MR05) . . . . . . . . . . . . . . . . . . . . . . . . . . 26

DV Polarity (MR06) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Reserved (MR07) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

MODE REGISTER 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

MR1 (MR17–MR10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

MR1 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 27

Pixel Data Enable (MR10) . . . . . . . . . . . . . . . . . . . . . . . . 27

Input Format (MR11) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Test Pattern Enable (MR12) . . . . . . . . . . . . . . . . . . . . . . 27

Test Pattern Hatch/Frame (MR13) . . . . . . . . . . . . . . . . . 27

VBI Open (MR14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Reserved (MR15–MR17) . . . . . . . . . . . . . . . . . . . . . . . . . 27

MODE REGISTER 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

MR1 (MR27–MR20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

MR2 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 28

Y Delay (MR20–MR22) . . . . . . . . . . . . . . . . . . . . . . . . . 28

Color Delay (MR23–MR25) . . . . . . . . . . . . . . . . . . . . . . 28

Reserved (MR26–MR27) . . . . . . . . . . . . . . . . . . . . . . . . . 28

MODE REGISTER 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

MR3 (MR37–MR30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

MR3 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 28

HDTV Enable (MR30) . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Reserved (MR31–MR32) . . . . . . . . . . . . . . . . . . . . . . . . . 28

DAC A Control (MR33) . . . . . . . . . . . . . . . . . . . . . . . . . 28

DAC B Control (MR34) . . . . . . . . . . . . . . . . . . . . . . . . . 28

DAC C Control (MR35) . . . . . . . . . . . . . . . . . . . . . . . . . 28

Reserved (MR36–MR37) . . . . . . . . . . . . . . . . . . . . . . . . . 28

MODE REGISTER 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

MR4 (MR47–MR40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

MR4 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 29

Timing Reset (MR40) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Reserved (MR41–MR47) . . . . . . . . . . . . . . . . . . . . . . . . . 29

MODE REGISTER 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

MR5 (MR57–MR50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

MR5 BIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 29

Reserved (MR50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

RGB Mode (MR51) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Sync on PrPb (MR52) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Color Output Swap (MR53) . . . . . . . . . . . . . . . . . . . . . . 29

Reserved (MR54–MR57) . . . . . . . . . . . . . . . . . . . . . . . . . 29

DAC TERMINATION AND LAYOUT

CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

PC BOARD LAYOUT CONSIDERATIONS . . . . . . . . . . 30

Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Digital Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . . . 31

Analog Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . . 31

Video Output Buffer and Optional Output Filter . . . . . . . 31

OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . 36

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