What causes Iib spikes

AN4587

6/14

DocID026923 Rev 1

1.2

Clock feed through

Current spikes are also due to the imbalanced parasitic capacitance on the input of the

chopper which is generally called “clock feed through”. Effectively, as shown in Figure 9, the

MOS presents a parasitic capacitance, Cp, and an AC spike appears on each clock

transition of the chopper stages.

Figure 9. Parasitic capacitance of the chopper architecture causing clock feed

through

This AC current can be expressed as a DC current on the input pin of the TSZ121 with an

average value given by Equation 3.

Equation 3

Where

The input bias current expressed in the datasheet of the TSZ121 is represented by the sum

of the injection charge and the offset due to the clock feed through. It can be expressed as

shown in Equation 4.

Equation 4

Due to the chopper architecture using switching MOS, the input bias current of this kind of

op amp shows a net DC current slightly higher than a traditional CMOS op amp. As

expressed by Equation 4 the input bias current mainly depends on the Vcc and the input

common mode voltage.

Figure 10 and 11 show the variation of the Iib depending on these two parameters. The

value of the Iib increases. However, the higher the input common mode voltage, Vicm, the

lower the input bias current (Equation 2) because the total charge in the MOS is decreased.

2

fchop

ΔCp Vcc

⋅⋅

⋅

=

(3)

ΔCp

Cp1 Cp4

–

()

Cp2 Cp3

–

()

–

=

+

=

(4)