AN2354

ST10 ASC peripherals

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ST10 ASC peripherals

Unlike the old microcontrollers of the ST10 family, two Asynchronous/Synchronous Serial

(ASC) Interfaces are implemented on the latest ST10F27x and ST1025x, one as a standard

peripheral and the other one mapped on the XBUS. The so-called standard module,

instead, is present on all the devices of the ST10 family. The main differences between the

two interfaces are limited to the programming model and interrupt management; in terms of

general functionality and performance the two modules are equivalent.

The rest of the document refers only to the ST10F27x, recalling that all discussion regarding

the standard module is still valid for all the other ST10 microcontrollers.

These peripherals provide serial communication between the ST10F27x and other

microcontrollers, microprocessors or external peripherals. We refer to standard ASC

interface as ASC0 and XBUS ASC interface as ASC1.

The ASC interfaces provide two kind of operations: Asynchronous and Synchronous. In

synchronous mode, data is transmitted or received synchronously to a shift clock. In

asynchronous mode, 8- or 9-bit data transfer, parity generation and a number of stop bits

can be selected. Parity, framing and overrun error detection is provided to increase the

reliability of data transfers. Transmission and reception of data is double-buffered.

For multiprocessor communication, a mechanism to distinguish address from data byte is

included. Testing is supported by a loop-back option. A 13-bit baud rate generator provides

the ASC with a separate serial clock signal.

1.1

Register linked with ASC modules

While ASC0 is enabled by default after the reset, ASC1 must be enabled by setting XPEN

(bit 2 of SYSCON register) and bit 8 of XPERCON register. ASC0 is connected as an

alternate function of bit 10 and bit 11 of PORT3 (P3.10/TXD0, P3.11/RXD0). ASC1 is

connected as an alternate function of bit 6 and bit 7 of PORT8 (P8.6/TXD1 P8.7/RXD1).

Obviously, RX pins must be set as input and TX pins as output, using the standard direction

port register (DP3) for ASC0 and XS1PORT register for ASC1.

1.1.1

Control register

A control register controls the operating mode: S0CON for ASC0 and XS1CON for ASC1.

The first one is bit addressable; the second one is not bit addressable. However, two

additional registers (XS1CONSET and XS1CONCLR) are provided to set and clear single

bits. Setting a bit in XS1CONSET register sets the corresponding bit in XS1CON register;

clearing a bit has no effect. Likewise, setting a bit in XS1CONCLR register clears the

corresponding bit in XS1CON register; clearing a bit has no effect.

SxCON (0 for ASC0 and 1 for ASC1)

Reset value: 0000h

15

14

13

12

11

10

98

765

43

210

SxR

SxLB SxBRS SxODD

-

SxOE

SxFE

SxPE SxOEN SxFEN SxPEN SxREN SxSTP

SxM

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW

RW