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AN4057 Datasheet(PDF) 5 Page - STMicroelectronics

Part # AN4057
Description  This application note is addressed to system hardware designers using
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4057 Datasheet(HTML) 5 Page - STMicroelectronics

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AN4057
Overview
Doc ID 022842 Rev 2
5/13
1
Overview
These SPC560Pxx /SPC56APxx microcontrollers are members of a new microcontroller
family built on the Power Architecture®. The device is supplied externally with a single
voltage supply, which can be either 5 V or 3.3 V depending on application requirements.
Internally the chip operates with 2 supply voltages, namely the main supply (5 V or 3.3 V)
and the core logic supply (1.2 V).
This document provides guideline for the recommended configuration of the high and low
voltage supply for the internal regulator in order to ensure the correct power up sequence of
the microcontroller.
The note describes application fault conditions that may offset VDD_HV_REG significantly and
mitigating circuitries to ensure reliable power up in case of these fault conditions. The
standard supply circuitry and sequence that use in the recommended conditions of initial
power up on VDD_HV_REG pin starting from ground level are described in the
SPC560Pxx/SPC56APxx data sheet (for further details see Section Appendix A: Additional
information).
Possible causes of fault conditions injecting an offset voltage on VDD_HV_REG pin are
described in the following list:
Supply microcontrollers I/O VIN while the microcontroller is switched off with shorted
supply for VDD_HV_REG and VDD_HV_IO pins
Offset voltage injected on VDD_HV_REG by external signal(s) shorted to battery.
1.1
Power up sequencing
Preventing an overstress event or a malfunction within and outside the device, the
SPC560Pxx/SPC56APxx implements a specific power up sequence, as described in the
data sheet, to ensure each module is started only when all conditions for switching it ON are
available.
In case of a fault condition on the application board, that sequence may not be respected,
causing the device not to exit the power up.
Two possible fault conditions are described in the following sections. However, if the fault
cause is removed, the device (while within the absolute maximum ratings) works again,
without getting damaged, powering up properly.


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