2-Level turn-off

AN1944

10/21

5

2-Level turn-off

In the event of a short-circuit or over-current in the load, a large voltage overshoot can occur

across the IGBT at turn-off and can exceed the IGBT breakdown voltage. By reducing the

gate voltage before turn-off, the IGBT current is limited and the potential over-voltage is

reduced. This technique is called a 2-level turn-off. Both the level and duration of the

intermediate off-level are adjustable. Duration is set by an external resistor/capacitor in

conjunction with the integrated voltage reference for accurate timing. The level can be easily

set by an external Zener diode, and its value is selected depending on the IGBT

characteristics. This 2-level turn-off sequence takes place at each cycle; it has no effect if

the current does not exceed the normal maximum-rated value, but protects the IGBT in case

of over-current (with a slight increase of conduction losses).

This principle is shown on Figure 11. During the 2-level turn-off time, the OUTL output is

controlled by a comparator between the actual OUTL pin and an external reference voltage.

When the voltage on OUTL goes down as a result of the turn-off and reach the reference

threshold, then the OUTL output is disabled and the IGBT gate is not discharged further.

After the 2-level turn-off delay, the OUTL output is enabled again to end the turn-off

sequence.

To keep the output signal width unchanged relative to the input signal, the turn-on is delayed

by the same value as the 2-level turn-off delay (Figure 12).

Figure 11.

Principle schematic for 2-level turn-off feature

The duration of the 2-level turn-off is set by the external RC components, and is given by the

formula:

Equation 1

a range of delay from approximately 0.7 to 4.6 microseconds.

Control

Block

120µA

VREF

VH

5

2,5V

7

COFF

LVOFF

11

10

OUTL

VL

Lvoff

off

t

[]

0.7

R

[]

•

C

[]

•

=