Data Sheet

G15166EJ4V0DS

3

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input Offset Voltage

≤ 50 Ω

±2

±10

mV

Input Offset Current

Note 7

±5

±50

pA

Input Bias Current

Note 7

10

100

pA

Large Signal Voltage Gain

3000

9000

Supply Current

Note 8

800

1000

Common Mode Rejection Ratio

CMR

70

90

dB

Supply Voltage Rejection Ratio

SVR

70

90

dB

Output Voltage Swing

≥ 10 kΩ

±12

+14.0

–13.6

V

Common Model Input Voltage Range

±12

+15

–13

V

Slew Rate

SR

3

V/

Unity Gain Frequency

1

MHz

Input Equivalent Noise Voltage Density

Ω, f = 1 kHz

30

nV/

√Hz

Channel Separation

120

dB

Input Offset Voltage

±15

mV

±10

Input Offset Current

Note 7

±2

nA

Input Bias Current

Note 7

3.5

nA

Notes 7. Input bias currents flow into IC. Because each currents are gate leak current of P-channel J-FET on input

stage. And that are temperature sensitive. Short time measuring method is recommendable to maintain the

junction temperature close to the operating ambient temperature.

8. This current flows irrespective of the existence of use.