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AN1322 Datasheet(PDF) 3 Page - STMicroelectronics |
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AN1322 Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 9 page 3/9 MIGRATING AN APPLICATION FROM ST7263 REV.B TO ST7263B 4 SOFTWARE PORTING 4.1 DEVICE CONFIGURATION The ST7263B device features an option byte that provides two new optional functions: – Watchdog hardware selection, – Read out protection. This option byte allows the device to be configured independently of the application software. The option byte is also used to control certain functions that were previously managed in the Miscellaneous register (MISCR) in the ST7263 Rev.B: – 24 or 12 MHz oscillator selection function that provides an internal frequency of either 2, 4 or 8 MHz while maintaining a 6 MHz frequency for the USB – LVD Reset function that allows the MCU to reset other devices. Moreover, a new bit, the Slow Mode Select (SMS) bit, is added in the MISCR register and en- ables an internal divide-by-2 clock divider used to halve the CPU frequency for power saving reasons. Consequently, the MISCR register of the ST7263 Rev.B and ST7263B are not directly upward compatible and require some software adjustments. 4.1.1 Option Byte Description Five new configuration options are available as described below. Bit 5 = WDGSW Hardware or Software Watchdog This option bit selects the watchdog type. 0: Hardware (watchdog always enabled) 1: Software (watchdog to be enabled by software) Bit 4 = WDHALT Watchdog and HALT mode This option bit determines if a RESET is generated when entering HALT mode while the Watchdog is active. 0: No reset generation when entering HALT mode 1: Reset generation when entering HALT mode. Bit 3 = LVD Low Voltage Detector selection This option bit enables the LVD. 0: LVD Reset enabled 1: LVD Reset disabled 7 0 - - WDGSW WDHALT LVD - OSC24/12 FMP_R |
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Similar Description - AN1322 |
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