Rev.5.00, Sep.30.2003, page 1 of 9

HD74LV2G125A

Dual Bus Buffer with 3–state Output

REJ03D0099–0500Z

(Previous ADE-205-347D (Z))

Rev.5.00

Sep.30.2003

Description

The HD74LV2G125A has dual bus buffer with 3–state output in a 8 pin package. Output is disabled when

the associated output enable (

OE) input is high. To ensure the high impedance state during power up or

power down,

OE should be connected to V

resistor is determined by the current souring capability of the driver. Low voltage and high-speed operation

is suitable for the battery powered products (e.g., notebook computers), and the low power consumption

extends the battery life.

Features

• The basic gate function is lined up as Renesas uni logic series.

• Supplied on emboss taping for high-speed automatic mounting.

• Electrical characteristics equivalent to the HD74LV125A

Supply voltage range : 1.65 to 5.5 V

Operating temperature range : –40 to +85°C

• All inputs V

• Output current ±6 mA (@V

• All the logical input has hysteresis voltage for the slow transition.

• Ordering Information

Part Name

Package Type

Package Code

Package

Abbreviation

Taping Abbreviation

(Quantity)

HD74LV2G125AUSE SSOP-8 pin

TTP-8DBV

US

E (3,000 pcs/reel)