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AN2326 Datasheet(PDF) 10 Page - STMicroelectronics

Part # AN2326
Description  Calibrating the RC oscillator of the ST7ULTRALITE MCU using the mains
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2326 Datasheet(HTML) 10 Page - STMicroelectronics

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Software examples
AN2326
10/20
4
Software examples
A zip file attached to this application note contains the complete software of this calibration
method.
4.1
Single alternance
This version performs only one count between two edges and changes the value of the
RCCR/SICSR registers according to this measurement. This can lead to bad tuning if there
is noise on the reference signal.
4.1.1
Main program
;All the bytes from locations 80h to 85h are used by this software to store values or as control
registers but they can be reused safely after the clock has been set.
;dichotomy value
.value
equ
$81
;this byte contains the value which will be added or
subtracted to/from the RCCR last value at the end of each round
;capture values
.capture1
equ
$82
.capture2
equ
$83
;these two bytes contain the two values of the counter captured on
the edge of the mains, they are used to calculate the time elapsed between the two edges
;number of overflows
.nbover
equ
$84
;this byte contains the number of counter overflows during the
measurement
;control register
.cr
equ
$85
;this byte is used as a control register for the measurement. Its
bits allow or not the interrupts and show which step of the count is the current one.
.strtstp
equ
1
;this is set to start the count and reset to stop it
.lsb_RCCR
equ
7
;this bit is set when the first capture has occurred. It allows
the overflows to be counted
;address to program in NVM (optional)
.E2ADDR
equ $86
.RAM
equ $88
.main
ld A, #$63
ld AVDTHCR, A
; set internal clock to fRC/8 meaning 1MHz targeted
clr SICSR
; clear the 2 lowest significant bits located in this register
ld
A, #$80
;value containing the value which will be
ld
value, A
;add or subs to/from RCCR during the dichotomy
ld
RCCR, A
;RCCR is set to the middle of its range of value
clr
cr
;clear the byte use as control register for the count
next
clr
nbover
;clear the byte containing the number of timer overflow
ld
A, LTICR
;clear the ICF bit
rim
;interrupts enable
bset
LTCSR, #7
;enable input capture interrupt
bset
cr,#strtstp
;set the start-stop bit of cr: count can start
count
btjt cr, #strtstp, count; wait for the end of count
clr
LTCSR
;lite timer interrupts disable
srl
value
;dichotomy value divided by 2
ld
A,#$F9
;these lines calculate this equation:
ld
X,nbover
;
mul
X,A
;(nbover*$F9)+ capture2 - capture1
add
A, capture2
;
jrnc
nocarry
;this equation is calculated with 16 bits
inc
X
;


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