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AN3258 Datasheet(PDF) 11 Page - STMicroelectronics |
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AN3258 Datasheet(HTML) 11 Page - STMicroelectronics |
11 / 16 page AN3258 HSI calibration Doc ID 17825 Rev 1 11/16 1.5 LIN header error handling It is possible that slave node receives an invalid LIN header or a LIN header with an error. In this case, the LIN header detection flag (LHDF) is not set and the corresponding LIN header detection interrupt does not occur but, the LIN header error (LHE) flag is set. A LIN header error may occur under the following conditions: 1. The break delimiter is too short. 2. The sync field is not equal to 0x55 or the deviation error in the sync field is outside the LIN specification which allows a clock deviation of up to 14 % between the slave and master oscillators. 3. The framing error occurs in the sync field or the identifier field. 4. A LIN header reception timeout occurs. In the case of a LIN header error detection (LHE bit set), the LHE bit is cleared inside the interrupt service routine and the software waits for the new valid LIN header. 1.6 LIN divider update method Three registers are managed internally by the LINUART/UART1 peripheral for the automatic update of the LIN divider (LDIV). They are: 1. LDIV_NOM which stores the value written by software in the LINUART_BRR1 and LINUART_BRR2 registers. 2. LDIV_MEAS which stores the value of the LIN sync field measurement. 3. LDIV which stores the value which is used to generate the baud rate. The LDIV can be updated from the LDIV_MEAS register after the LIN sync field measurement or from the LDIV_NOM register after a software write in LINUART_BRR1. If LASE =1, the LDIV_MEAS is loaded automatically into LDIV after each LIN sync field measurement. The loading from LDIV_NOM into LDIV depends on the LDUM bit setting. If LDUM = 1, the LDIV_NOM value is loaded automatically into LDIV register at the end of character reception (RXNE =1). If LDUM =0, the LDIV_NOM value is loaded into LDIV after a software write into LINUART_BRR1. If the loading from LDIV_MEAS and LDIV_NOM into LDIV occurs at the same time, LDIV_NOM has the priority. |
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