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8600V Datasheet(PDF) 5 Page - Lattice Semiconductor

Part # 8600V
Description  3.3V In-System Programmable SuperBIG??High Density PLD
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

8600V Datasheet(HTML) 5 Page - Lattice Semiconductor

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Specifications ispLSI 8600V
5
0
PT 0
PT 1
PT 2
To Output Control MUX
PT 3
Macrocell 0
Macrocell 19
To Interconnect
To Interconnect
PT 8
PT 9
PT 10
PT 11
Macrocell 2
To Interconnect
20
PT 4
PT 5
PT 6
PT 7
Macrocell 1
To Interconnect
Feedback Inputs
0
1
2
19
43
PT 76
PT 77
PT 78
PT 79
PT 81
PT 80
PT 12
PT 13
PT 14
PT 15
Macrocell 3
To interconnect
3
PTSA Bypass
Single PT
PT Clock
PT Preset
PT Reset
From PTSA
Shared PT Clock
From Tristate
Bus Track
Bus Input
PTSA Bypass
Single PT
PT Clock
PT Preset
PT Reset
From PTSA
Shared PT Clock
From Tristate
Bus Track
Bus Input
PTSA Bypass
Single PT
PT Clock
PT Preset
PT Reset
From PTSA
Shared PT Clock
From Tristate
Bus Track
Bus Input
PTSA Bypass
Single PT
PT Clock
PT Preset
PT Reset
From PTSA
Shared PT Clock
From Tristate
Bus Track
Bus Input
PTSA Bypass
Single PT
PT Clock
PT Preset
PT Reset
From PTSA
Shared PT Clock
From Tristate Bus Track
Bus Input
General Purpose Big Fast Megablock Input Tracks
I/O Big Fast Megablock Input Tracks
AND Array Input
Routing
Fully Populated
AND Array
Product Term
Sharing Array
Function Selector (E2 Cell Controlled)
Note: Macrocells 9 and 10 do not support Tristate Bus Feedback.
Figure 2. ispLSI 8000V GLB Overview


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