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LTC1147-5 Datasheet(PDF) 9 Page - Linear Technology |
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LTC1147-5 Datasheet(HTML) 9 Page - Linear Technology |
9 / 16 page 9 LTC1147-3.3 LTC1147-5/LTC1147L sn1147 1147fds used. For VIN > 8V, a standard threshold MOSFET (VGS(TH) < 4V) may be used. If VIN is expected to drop below 8V, a logic-level threshold MOSFET (VGS(TH) < 2.5V) is strongly recommended. When a logic-level MOSFET is used, the LTC1147 supply voltage must be less than the absolute maximum VGS ratings for the MOSFET. The maximum output current IMAX determines the RDS(ON) requirement for the power MOSFET. When the LTC1147 series is operating in continuous mode, the simplifying assumption can be made that either the MOSFET or Schottky diode is always conducting the average load current. The duty cycles for the MOSFET and diode are given by: P-Ch Duty Cycle = VOUT VIN Schottky Diode Duty Cycle = (VIN – VOUT + VD) VIN From the duty cycle the required RDS(ON) for the MOSFET can be derived: P-Ch RDS(ON) = (VIN)(PP) (VOUT)(IMAX2)(1 + δP) where PP is the allowable power dissipation and δP is the temperature dependency of RDS(ON). PP will be deter- mined by efficiency and/or thermal requirements (see Efficiency Considerations). (1 + δ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs tempera- ture curve, but δ = 0.007/°C can be used as an approxima- tion for low voltage MOSFETs. Output Diode Selection (D1) The Schottky diode D1 shown in Figure 1 only conducts during the off-time. It is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. The most stressful condition for the output diode is under short circuit (VOUT = 0V). Under this condition the diode must safely handle ISC(PK) at close to 100% duty cycle. Under normal load conditions the average current con- ducted by the diode is: (VIN – VOUT + VD) VIN (ILOAD) ID1 = Remember to keep lead lengths short and observe proper grounding (see Board Layout Checklist) to avoid ringing and increased dissipation. The forward voltage drop allowable in the diode is calcu- lated from the maximum short-circuit current as: VF ≈ PD ISC(PK) where PD is the allowable power dissipation and will be determined by efficiency and/or thermal requirements (see Efficiency Considerations). CIN and COUT Selection In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capaci- tor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN Required IRMS ≈ IMAX [VOUT(VIN – VOUT)]1/2 VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is com- monly used for design because even significant devia- tions do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height require- ments in the design. Always consult the manufacturer if there is any question. An additional 0.1 µF to 1µF ceramic decoupling capacitor is also required on VIN (Pin 1) for high frequency decoupling. The selection of COUT is driven by the required effective series resistance (ESR). The ESR of COUT must be less than twice the value of RSENSE for proper operation of the LTC1147: COUT Required ESR < 2RSENSE APPLICATIO S I FOR ATIO |
Similar Part No. - LTC1147-5_15 |
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Similar Description - LTC1147-5_15 |
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