Electronic Components Datasheet Search |
|
LT1185CT Datasheet(PDF) 9 Page - Linear Technology |
|
LT1185CT Datasheet(HTML) 9 Page - Linear Technology |
9 / 16 page 9 LT1185 APPLICATIO S I FOR ATIO Figure 2. Proper Connection of Positive Sense Lead Shutdown Techniques The LT1185 can be shut down by open-circuiting the REF pin. The current flowing into this pin must be less than 0.4 µA to guarantee shutdown. Figure 3 details several ways to create the “open” condition, with various logic levels. For variations on these schemes, simply remember that the voltage on the REF pin is 2.4V negative with respect to the ground pin. Output Overshoot Very high input voltage slew rate during start-up may cause the LT1185 output to overshoot. Up to 20% over- shoot could occur with input voltage ramp-up rate exceed- ing 1V/ µs. This condition cannot occur with normal 50Hz to 400Hz rectified AC inputs because parasitic resistance and inductance will limit rate of rise even if the power switch is closed at the peak of the AC line voltage. This assumes that the switch is in the AC portion of the circuit. If instead, a switch is placed directly in the regulator input so that a large filter capacitor is precharged, fast input slew rates will occur on switch closure. The output of the regulator will slew at a rate set by current limit and output capacitor size; dVdt = ILIM/COUT. With ILIM = 3.6A and COUT = 2.2 µF, the output will slew at 1.6V/µs and overshoot can occur. This overshoot can be reduced to a few hundred millivolts or less by increasing the output capacitor to 10 µF and/or reducing current limit so that output slew rate is held below 0.5V/ µs. A second possibility for creating output overshoot is recovery from an output short. Again, the output slews at a rate set by current limit and output capacitance. To avoid overshoot, the ratio ILIM/COUT should be less than 0.5 × 106. Remember that load capacitance can be added to COUT for this calculation. Many loads will have multiple supply bypass capacitors that total more than COUT. + – R1* 2.37k R2 REF GND FB VOUT VIN LT1185 RLIM + – VIN VOUT LT1185 • F02 LOAD PARASITIC LEAD RESISTANCES – rb + IGND ra *R1 SHOULD BE CONNECTED DIRECTLY TO GROUND LEAD, NOT TO THE LOAD, SO THAT ra ≈ 0Ω. THIS LIMITS THE OUTPUT VOLTAGE ERROR TO (IGND)(rb). ERRORS CREATED BY ra ARE MULTIPLIED BY (1 + R2/R1). NOTE THAT VOUT INCREASES WITH INCREASING GROUND PIN CURRENT. R2 SHOULD BE CONNECTED DIRECTLY TO LOAD FOR REMOTE SENSING |
Similar Part No. - LT1185CT |
|
Similar Description - LT1185CT |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |