4

LT1195

LT1195C

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input Offset Voltage

J8, N8 Package

1.0

10.0

mV

S8 Package

1.0

15.0

mV

15

µV/°C

Input Offset Current

0.2

1.7

µA

Input Bias Current

±0.5

±2.5

µA

Input Voltage Range

(Note 3)

2.0

3.5

V

CMRR

Common-Mode Rejection Ratio

60

85

dB

Output Voltage Swing

3.5

3.75

V

0.15

0.4

V

Supply Current

12

16

mA

Shutdown Supply Current

0.9

2.0

mA

Shutdown Pin Current

525

µA

LT1195C

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input Offset Voltage

J8, N8 Package

3.0

10.0

mV

S8 Package

3.0

15.0

mV

12

µV/°C

Input Offset Current

0.2

1.7

µA

Input Bias Current

±0.5

±2.5

µA

CMRR

Common-Mode Rejection Ratio

60

85

dB

PSRR

Power Supply Rejection Ratio

60

90

dB

Large-Signal Voltage Gain

2.0

7.5

V/mV

0.3

1.5

V/mV

Output Voltage Swing

±3.7

±3.9

V

Supply Current

12

17

mA

Shutdown Supply Current

0.9

2.0

mA

Shutdown Pin Current

525

µA

0

0

Note 1: A heat sink may be required to keep the junction temperature

below absolute maximum when the output is shorted continuously.

LT1195MJ8, LT1195CJ8:

LT1195N:

LT1195CS:

Note 3: Exceeding the input common-mode range may cause the output

to invert.

Note 4: Slew rate is measured between

±1V on the output, with ±3V

input step.

Note 5: Full power bandwidth is calculated from the slew rate

measurement: FPBW = SR/2

Note 6: Settling time measurement techniques are shown in “Take the

Guesswork Out of Settling Time Measurements,” EDN, September 19, 1985.

Note 8: See Applications Information section for shutdown at elevated

Note 9: AC parameters are 100% tested on the ceramic and plastic DIP

packaged parts (J8 and N8 suffix) and are sample tested on every lot of

the SO packaged parts (S8 suffix).

ELECTRICAL C

C

HARA TERISTICS

–

+5V

5V

ELECTRICAL C

C

HARA TERISTICS