3

LT1719

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Timing Jitter

15

f = 20MHz

–

11

Maximum Toggle Frequency

70

MHz

62.5

MHz

Turn-Off Delay

75

ns

Wake-Up Delay

350

ns

Positive Input Stage Supply Current

q

1.0

2.2

mA

q

0.9

1.8

mA

Negative Input Stage Supply Current

q

– 4.8

– 2.6

mA

q

– 3.8

– 2.2

mA

Positive Output Stage Supply Current

q

4.2

8

mA

q

3.3

6

mA

Disabled Supply Currents

q

0.2

30

µA

q

750

µA

q

– 30

– 0.2

µA

q

0.1

20

µA

Shutdown Pin Open

q

0.1

20

µA

q

– 20

0.1

µA

Note 1: Absolute Maximum Ratings are those values beyond which the

life of a device may be impaired.

Note 2: If one input is within these common mode limits, the other

input can go outside the common mode limits and the output will be

valid.

Note 3: The LT1719 comparator includes internal hysteresis. The trip

points are the input voltage needed to change the output state in each

and is defined as the worst of: the change in offset voltage from

3.3V.

Note 6: Because of internal hysteresis, there is no small-signal region

in which to measure gain. Proper operation of internal circuity is

Note 7: Propagation delay measurements made with 100mV steps.

low values of overdrive. The LT1719 is 100% tested with a 100mV

can be guaranteed with this test, if additional DC tests are performed

to guarantee that all internal bias conditions are correct.

Note 9: Propagation Delay Skew is defined as:

+ IN (Pin 2): Noninverting Input of Comparator.

– IN (Pin 3): Inverting Input of Comparator.

Chip Substrate.

GND (Pin 5): Ground.

SHDN (Pin 6): Shutdown. Pull to ground to enable

comparator.

OUT (Pin 7): Output of Comparator.