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LT1881ACN8 Datasheet(PDF) 9 Page - Linear Technology

Part # LT1881ACN8
Description  Dual and Quad Rail-to-Rail Output, Picoamp Input Precision Op Amps
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT1881ACN8 Datasheet(HTML) 9 Page - Linear Technology

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LT1881/LT1882
9
APPLICATIO S I FOR ATIO
The LT1881 dual and LT1882 quad op amps feature
exceptional input precision with rail-to-rail output swing.
The amplifiers are similar to the LT1884 and LT1885
devices. The LT1881 and LT1882 offer superior capacitive
load driving capabilities over the LT1884 and LT1885 in
low voltage gain configurations. Offset voltages are trimmed
to less than 50
µV and input bias currents are less than
200pA on the “A” grade devices. Obtaining beneficial
advantage of these precision input characteristics de-
pends upon proper applications circuit design and board
layout.
Preserving Input Precision
Preserving the input voltage accuracy of the LT1881/
LT1882 requires that the applications circuit and PC board
layout do not introduce errors comparable to or greater
than the 30
µV offset. Temperature differentials across the
input connections can generate thermocouple voltages of
10’s of microvolts. PC board layouts should keep connec-
tions to the amplifier’s input pins close together and away
from heat dissipating components. Air currents across the
board can also generate temperature differentials.
The extremely low input bias currents, 150pA, allow high
accuracy to be maintained with high impedance sources
and feedback networks. The LT1881/LT1882’s low input
bias currents are obtained by using a cancellation circuit
on-chip. This causes the resulting IBIAS+ and IBIAS– to be
uncorrelated, as implied by the IOS specification being
greater than the IBIAS. The user should not try to balance
the input resistances in each input lead, as is commonly
recommended with most amplifiers. The impedance at
either input should be kept as small as possible to mini-
mize total circuit error.
PC board layout is important to insure that leakage cur-
rents do not corrupt the low IBIAS of the amplifier. In high
precision, high impedance circuits, the input pins should
be surrounded by a guard ring of PC board interconnect,
with the guard driven to the same common mode voltage
as the amplifier inputs.
Input Common Mode Range
The LT1881 and LT1882 outputs are able to swing nearly
to each power supply rail, but the input stage is limited to
operating between VEE + 0.8V and VCC – 0.9V. Exceeding
this common mode range will cause the gain to drop to
zero; however, no gain reversal will occur.
Input Protection
The inverting and noninverting input pins of the LT1881
and LT1882 have limited on-chip protection. ESD protec-
tion is provided to prevent damage during handling. The
input transistors have voltage clamping and limiting resis-
tors to protect against input differentials up to 10V. Short
transients above this level will also be tolerated. If the input
pins can see a sustained differential voltage above 10V,
external limiting resistors should be used to prevent
damage to the amplifier. A 1k resistor in each input lead
will provide protection against a 30V differential voltage.
Capacitive Loads
The LT1881 and LT1882 can drive capacitive loads up to
1000pF in unity-gain. The capacitive load driving in-
creases as the amplifier is used in higher gain configura-
tions. Capacitive load driving may be increased by
decoupling the capacitance from the output with a small
resistance.


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