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LTC1159-3.3 Datasheet(PDF) 9 Page - Linear Technology

Part # LTC1159-3.3
Description  High Efficiency Synchronous Step-Down Switching Regulators
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1159-3.3 Datasheet(HTML) 9 Page - Linear Technology

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LTC1159/LTC1159-3.3/LTC1159-5
APPLICATIO S I FOR ATIO
N-Ch PD =
VIN – VOUT
VIN
(IMAX)2 (1 + ∂N) RDS(ON)
P-Ch PD =
VOUT
VIN
(IMAX)2 (1 + ∂P) RDS(ON) +
k(VIN)2 (IMAX) (CRSS) (f)
where
∂ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the P-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For VIN < 20V the
high current efficiency generally improves with larger
MOSFETs, while for VIN > 20V the transition losses rapidly
increase to the point that the use of a higher RDS(ON)
device with lower CRSS actually provides higher effi-
ciency. The N-channel MOSFET losses are the greatest at
high input voltage or during a short circuit when the N-
channel duty cycle is nearly 100%.
The term (1 +
∂)isgenerallygivenforaMOSFETintheform
of a normalized RDS(ON) vs Temperature curve, but
∂ = 0.007/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
electrical characteristics. The constant k = 5 can be used for
the LTC1159 to estimate the relative contributions of the
two terms in the P-channel dissipation equation.
The Schottky diode D1 shown in Figure 1 only conducts
during the dead time between the conduction of the two
power MOSFETs. D1 prevents the body diode of the
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1% in
efficiency (although there are no other harmful effects if
D1 is omitted). Therefore, D1 should be selected for a
forward voltage of less than 0.6V when conducting IMAX.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/VIN.
To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
CIN Required IRMS
IMAX [VOUT(VIN – VOUT)]1/2
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IMAX/2. This simple worst case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. An additional 0.1
µF ceramic capacitor may also be
required on VIN for high frequency decoupling.
The selection of COUT is driven by the required effective
series resistance (ESR). The ESR of COUT must be less than
twice the value of RSENSE for proper operation of the
LTC1159:
COUT Required ESR < 2RSENSE
Optimum efficiency is obtained by making the ESR equal to
RSENSE. Manufacturers such as Nichicon, Chemicon, and
Sprague should be considered for high performance ca-
pacitors. The OS-CON semiconductor dielectric capacitor
available from Sanyo has the lowest ESR for its size at a
somewhat higher price. Once the ESR requirement for
COUT has been met, the RMS current rating generally far
exceeds the IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the capacitance, ESR, or RMS
current handling requirements of the application. Alumi-
num electrolytic and dry tantalum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalums, available
in case heights ranging from 2mm to 4mm. For example,
if 200
µF/10V is called for in an application requiring 3mm
height, two AVX 100
µF/10V (P/N TPSD107K010) could be
used. Consult the manufacturer for other specific recom-
mendations.
At low supply voltages, a minimum value of COUT is
suggested to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When COUT is too small, the
output ripple at low frequencies will be large enough to
trip the voltage comparator. This causes the Burst Mode
operation to be activated when the LTC1159 would
normally be in continuous operation. The effect is most


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