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LTC1291DMJ8 Datasheet(PDF) 7 Page - Linear Technology

Part # LTC1291DMJ8
Description  Single Chip 12-Bit Data Acquisition System
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1291DMJ8 Datasheet(HTML) 7 Page - Linear Technology

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LTC1291
TEST CIRCUITS
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
Voltage Waveforms for DOUT Delay Time, tdDO
CLK
DOUT
0.8V
tdDO
0.4V
2.4V
1291 TC03
DOUT
0.4V
2.4V
tr
tf
1291 TC04
Voltage Waveforms for ten
DOUT
CS
START
0.8V
ten
B11
1291 TC07
1
2
34
5
DIN
CLK
S
APPLICATI
I FOR ATIO
being transmitted on the falling CLK edge and captured on
the rising CLK edge in both transmitting and receiving
systems.
The LTC1291 is a data acquisition component which
contains the following functional blocks:
1. 12-bit successive approximation capacitive A/D
converter
2. Analog multiplexer (MUX)
3. Sample-and-hold (S/H)
4. Synchronous, half duplex serial interface
5. Control and timing logic
DIGITAL CONSIDERATIONS
Serial Interface
The LTC1291 communicates with microprocessors and
other external circuitry via a synchronous, half duplex,
four-wire serial interface (see Operating Sequence). The
clock (CLK) synchronizes the data transfer with each bit
Figure 1
The input data is first received and then the A/D conversion
result is transmitted (half duplex). Because of the half
duplex operation DIN and DOUT may be tied together
allowing transmission over just 3 wires: CS, CLK and
CS
DOUT 1
DIN 1
SHIFT MUX
ADDRESS IN
1 NULL
BIT
SHIFT A/D CONVERSION
RESULT OUT
1291 F01
DIN 2
DOUT 2


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