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UPD75P3018GC-3B9 Datasheet(PDF) 8 Page - NEC

Part # UPD75P3018GC-3B9
Description  4-BIT SINGLE-CHIP MICROCONTROLLER
Download  60 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD75P3018GC-3B9 Datasheet(HTML) 8 Page - NEC

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µPD75P3018
8
3.2 Non-port Pins (1/2)
Pin name
I/O
Shared by
Function
Status
I/O circuit
after reset
typeNote
TI0
Input
P13
External event pulse input to timer/event counter
Input
<B>-C
TI1, TI2
Input
P12/INT2
PTO0
I/O
P20
Timer/event counter output
Input
E-B
PTO1
P21
PTO2
P22
PCL
Output
P22
Clock output
Input
E-B
BUZ
I/O
P23
Frequency output (for buzzer or system clock trimming)
Input
E-B
SCK
I/O
P01
Serial clock I/O
Input
<F>-A
SO/SB0
I/O
P02
Serial data output
Input
<F>-B
Serial data bus I/O
SI/SB1
I/O
P03
Serial data input
Input
<M>-C
Serial data bus I/O
INT4
Input
P00
Edge detection vectored interrupt input
Input
<B>
(valid for detecting both rising and falling edges)
INT0
Input
P10
Edge detection vectored interrupt input Clock synch/asynch
Input
<B>-C
(detected edge is selectable)
is selectable
INT1
P11
Asynch
INT2
Input
P12/TI1/TI2
Rising edge detection test input
Asynch
Input
<B>-C
KR0-KR3
I/O
P60-P63
Parallel falling edge detection test input
Input
<F>-A
KR4-KR7
I/O
P70-P73
Parallel falling edge detection test input
Input
<F>-A
X1
Input
Ceramic/crystal oscillation circuit connection for main system
clock. If using an external clock, input to X1 and input
X2
inverted phase to X2.
XT1
Input
Crystal oscillation circuit connection for subsystem clock.
If using an external clock, input to XT1 and input inverted
XT2
phase to XT2. XT1 can be used as a 1-bit (test) input.
RESET
Input
System reset input
<B>
MD0
I/O
P30/LCDCL
Mode selection for program memory (PROM) write/verify
Input
E-B
MD1
P31/SYNC
MD2, MD3
P32, P33
D0-D3
I/O
P40-P43
Data bus for program memory (PROM) write/verify
Input
M-E
D4-D7
P50-P53
VPP
Programmable power supply voltage for program memory
(PROM) write/verify.
For normal operation, connect directly to VDD.
Apply +12.5 V for PROM write/verify.
VDD
Positive power supply
Vss
Ground
Note
Circuit types enclosed in brackets indicate Schmitt trigger input.


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