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UPD75P3116 Datasheet(PDF) 6 Page - NEC |
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UPD75P3116 Datasheet(HTML) 6 Page - NEC |
6 / 60 page µPD75P3116 6 3. PIN FUNCTIONS 3.1 Port Pins (1/2) Pin name I/O Alternate function Function 8-bit Status I/O circuit I/O after reset typeNote 1 P00 Input INT4 4-bit input port (PORT0) X Input <B> P01 to P03 are 3-bit pins for which connection of P01 I/O SCK an internal pull-up resistor can be specified by <F>-A software. P02 I/O SO/SB0 <F>-B P03 I/O SI/SB1 <M>-C P10 Input INT0 4-bit input port (PORT1) X Input <B>-C Connection of an internal pull-up resistor can be P11 INT1 specified by software in 4-bit units. P10/INT0 can select noise elimination circuit. P12 TI1/TI2/INT2 P13 TI0 P20 I/O PTO0 4-bit I/O port (PORT2) X Input E-B Connection of an internal pull-up resistor P21 PTO1 can be specified by software in 4-bit units. P22 PCL/PTO2 P23 BUZ P30 I/O LCDCL/MD0 Programmable 4-bit I/O port (PORT3) X Input E-B Input and output in single-bit units can be specified. P31 SYNC/MD1 When set for 4-bit units, connection of an internal pull-up resistor can be specified by software. P32 MD2 P33 MD3 P50 Note 2 I/O D4 N-ch open-drain 4-bit I/O port (PORT5) X High M-E When set to open-drain, voltage is 13 V. impedance P51 Note 2 D5 P52 Note 2 D6 P53 Note 2 D7 Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input. 2. Low-level input leakage current increases when input instructions or bit manipulation instructions are executed. |
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