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IRF1324S-7PPBF Datasheet(PDF) 2 Page - International Rectifier |
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IRF1324S-7PPBF Datasheet(HTML) 2 Page - International Rectifier |
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2 / 10 page  2 www.irf.com © 2014 International Rectifier Submit Datasheet Feedback April 08, 2014 IRF1324S-7PPbF Notes: Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 240A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140 http://www.irf.com/technical-info/appnotes/an-1140.pdf Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.018mH RG = 25 Ω, IAS = 160A, VGS =10V. Part not recommended for use above this value. S D G ISD ≤ 160A, di/dt ≤ 600A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400μs; duty cycle ≤ 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994. Rθ is measured at TJ approximately 90°C Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V(BR)DSS Drain-to-Source Breakdown Voltage 24 ––– ––– V ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.023 ––– V/°C RDS(on) Static Drain-to-Source On-Resistance ––– 0.80 1.0 m Ω VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V IDSS Drain-to-Source Leakage Current ––– ––– 20 μA ––– ––– 250 IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA Gate-to-Source Reverse Leakage ––– ––– -200 RG Internal Gate Resistance ––– 3.0 ––– Ω Dynamic @ TJ = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units gfs Forward Transconductance 270 ––– ––– S Qg Total Gate Charge ––– 180 252 nC Qgs Gate-to-Source Charge ––– 47 ––– Qgd Gate-to-Drain ("Miller") Charge ––– 58 ––– Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 122 ––– td(on) Turn-On Delay Time ––– 19 ––– ns tr Rise Time ––– 240 ––– td(off) Turn-Off Delay Time ––– 86 ––– tf Fall Time ––– 93 ––– Ciss Input Capacitance ––– 7700 ––– pF Coss Output Capacitance ––– 3380 ––– Crss Reverse Transfer Capacitance ––– 1930 ––– Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 4780 ––– Coss eff. (TR) Effective Output Capacitance (Time Related)h ––– 4970 ––– Diode Characteristics Symbol Parameter Min. Typ. Max. Units IS Continuous Source Current ––– ––– 429 A (Body Diode) ISM Pulsed Source Current ––– ––– 1636 A (Body Diode) Ãd VSD Diode Forward Voltage ––– ––– 1.3 V trr Reverse Recovery Time ––– 71 107 ns TJ = 25°C VR = 20V, ––– 74 110 TJ = 125°C IF = 160A Qrr Reverse Recovery Charge ––– 83 120 nC TJ = 25°C di/dt = 100A/μs g ––– 92 140 TJ = 125°C IRRM Reverse Recovery Current ––– 2.0 ––– A TJ = 25°C ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Conditions VDS = 50V, ID = 160A ID = 75A VGS = 20V VGS = -20V MOSFET symbol showing the VDS =12V Conditions VGS = 10V g VGS = 0V VDS = 19V ƒ = 1.0MHz, See Fig.5 VGS = 0V, VDS = 0V to 19V i, See Fig.11 VGS = 0V, VDS = 0V to 19V hà TJ = 25°C, IS = 160A, VGS = 0V g integral reverse p-n junction diode. Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 5mAd VGS = 10V, ID = 160A g VDS = VGS, ID = 250μA VDS = 24V, VGS = 0V VDS = 19V, VGS = 0V, TJ = 125°C ID = 160A RG =2.7Ω VGS = 10V g VDD = 16V ID = 75A, VDS =0V, VGS = 10V g |
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