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MAX1816 Datasheet(PDF) 6 Page - Maxim Integrated Products |
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MAX1816 Datasheet(HTML) 6 Page - Maxim Integrated Products |
6 / 49 page Dual Step-Down Controllers Plus Linear- Regulator Controller for Notebook Computers 6 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 1, V+ = 15V, VOUT1 = 1.20V, VOUT2 = 2.50V, VCC = VDD = 5.0V, VSKP1/SDN = VSKP2/SDN = VLIN/SDN = 5.0V, TA = 0°C to +85°C. Typical values are at TA = +25 °C, unless otherwise noted.) PARAMETER CONDITIONS MIN TYP MAX UNITS DH2 Gate-Driver Source/Sink Current DH2 forced to 2.5V, BST2–LX2 forced to 5V 0.75 A DL2 Gate-Driver Sink Current DL2 forced to 2.5V 2.5 A DL2 Gate-Driver Source Current DL2 forced to 2.5V 0.75 A DL2 rising 35 Dead Time DH2 rising 26 ns LINFB Input Bias Current VLINFB = 1.035V -100 +100 nA VLINFB = 1.05V, VLINBSE = 5V 0.4 LINBSE Drive Current VLINFB = 0.965V, VLINBSE = 0.5V 20 mA LINFB Regulation Voltage VLINBSE = 5V, ILINBSE = 4mA (sink) 0.988 1.000 1.017 V LINFB Load Regulation VLINBSE = 5V, ILINBSE = 2mA to 10mA (sink) -2.2 -1.2 % Logic Input High Voltage D0–D4, SUS, PERF, LIN/SDN 2.4 V Logic Input Low Voltage D0–D4, SUS, PERF, LIN/SDN 0.8 V Logic Input High Voltage DPSLP 0.8 V Logic Input Low Voltage DPSLP 0.4 V Logic Input Current D0–D4, SUS, PERF, LIN/SDN, DPSLP = 0V or 5V -1 +1 µA Four-Level Logic VCC Level TON, S0, S1, GAIN logic input high level VCC - 0.4 V Four-Level Logic Float Level TON, S0, S1, GAIN logic input upper midlevel 3.15 3.85 V Four-Level Logic REF Level TON, S0, S1. GAIN logic input lower midlevel 1.65 2.35 V Four-Level Logic GND Level TON, S0, S1, GAIN logic input low level 0.5 V SKP1/SDN, SKP2/SDN, S0, S1, GAIN, and TON Logic-Input Current SKP1/SDN, SKP2/SDN, TON, S0, S1, GAIN forced to GND or VCC -3 +3 µA SKP1/SDN, SKP2/SDN Skip Level SKP1/SDN, SKP2/SDN logic input high level 2.8 V SKP1/SDN, SKP2/SDN PWM Level SKP1/SDN, SKP2/SDN logic input float level 1.4 2.2 V SKP1/SDN, SKP2/SDN Shutdown Level SKP1/SDN, SKP2/SDN logic input low level 0.4 V SKP1/SDN Test Mode Input Voltage Range To enable no-fault mode, 4.5V < VCC < 5.5V 10.8 13.2 V PGOOD Lower Trip Threshold Measured at FBS, OUT2, and FB2 with respect to unloaded output voltage, falling edge, typical hysteresis = 1% -12.0 -10.0 -8.0 % LINGOOD Lower Trip Threshold and LINFB Undervoltage Protection Threshold Measured at LINFB with respect to unloaded output voltage, falling edge (Note 5) -12.0 -10.0 -8.0 % PGOOD Upper Trip Threshold Measured at FBS, OUT_, FB2 with respect to unloaded output voltage, rising edge, typical hysteresis = 1% 8.0 10.0 12.0 % |
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Similar Description - MAX1816 |
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