Detailed Description

The MAX1856 current-mode PWM controller uses an

inverting flyback configuration that is ideal for generat-

ing the high negative voltages required for SLIC power

supplies. Optimum conversion efficiency is maintained

over a wide range of loads by employing both PWM

operation and Maxim’s proprietary Idle Mode control to

minimize operating current at light loads. Other features

include shutdown, adjustable internal operating fre-

quency or synchronization to an external clock, soft-

start, adjustable current limit, and a wide (3V to 28V)

input range.

PWM Controller

The heart of the MAX1856 current-mode PWM con-

troller is a BiCMOS multi-input comparator that simulta-

neously processes the output-error signal, the

current-sense signal, and a slope-compensation ramp

(Figure 2). The main PWM comparator is direct sum-

ming, lacking a traditional error amplifier and its associ-

ated phase shift. The direct-summing configuration

approaches ideal cycle-by-cycle control over the out-

put voltage since there is no conventional error amplifi-

er in the feedback path.

In PWM mode, the controller uses fixed-frequency, cur-

rent-mode operation where the duty ratio is set by the

input-to-output voltage ratio and the transformer’s turn

ratio. The current-mode feedback loop regulates peak

inductor current as a function of the output error signal.

At light loads, the controller enters Idle Mode. During

Idle Mode, switching pulses are provided only as nec-

essary to supply the load, and operating current is min-

imized to provide the best light-load efficiency. The

minimum-current comparator threshold is 15mV, or

controller is synchronized to an external clock, Idle

Mode occurs only at very light loads.

Wide Input Range, Synchronizable,

PWM SLIC Power Supply

8

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Pin Description

PIN

NAME

FUNCTION

1LDO

5V Linear Regulator Output. The regulator powers all of the internal circuitry, including the EXT gate

driver. Bypass LDO to GND with a 1µF or greater ceramic capacitor.

2

FREQ

500k

an external clock is connected to SYNC/

SHDN.

3

GND

Analog Ground

4

REF

1.25V Reference Output. REF can source up to 400µA. Bypass to GND with a 2.2µF ceramic capacitor.

5

FB

Feedback Input. The feedback voltage threshold is 0.

6

CS

7

PGND

Power Ground

8

EXT

External MOSFET Gate-Driver Output. EXT swings from LDO to PGND.

ceramic capacitor.

10

SYNC/

SHDN

Shutdown Control and Synchronization Input. There are three operating modes:

• SYNC/SHDN low: shutdown mode

• SYNC/SHDN high: the DC-to-DC controller operates with the oscillator frequency set at FREQ by

• SYNC/SHDN clocked: the DC-to-DC controller operates with the oscillator frequency set by the SYNC

clock input. The conversion cycles initiate on the rising edge of the input clock signal. However, the