Dual 180° Out-of-Phase Buck Controllers with

Sequencing/Prebias Startup and POR

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11

VOUT1

SS1

VOUT2

SS2

DH1

DL1

DH2

DL2

UVLO

A

B

C

D

E

F

G

H

I

J

K

M

L

EN

P

O

N

MAX1858A POWER-ON-OFF SEQUENCING DEFINITIONS

SYMBOL

DEFINITION

EN

VOUT1

SS1

VOUT2

SS2

DH1

DL1

DH2

DL2

A

B

Internal 5V Linear-Regulator Output

Active-High Enable Input

Regulator 1 Output Voltage

Regulator 1: Internal Soft-Start Input Signal into Error Amplifier

Regulator 2 Output Voltage

Regulator 2: Internal Soft-Start Input Signal into Error Amplifier

Regulator 1: High-Side Gate-Driver Output

Regulator 1: Low-Side Gate-Driver Output

Regulator 2: High-Side Gate-Driver Output

Regulator 2: Low-Side Gate-Driver Output

SYMBOL

DEFINITION

D

E

F

Normal operation

UVLO

Undervoltage threshold value is provided in the

Electrical Characteristics table.

EN is pulled high. DH1 and DL1 start switching. DH2 and

DL2 are off.

C

Resumes normal operation. DH1 and DL1 start switching.

DH2 and DL2 are off.

EN is pulled low and then high.

H

G

VOUT1 must reach 0V before restarting due to the cycling

of the enable in region H (above).

VOUT1 recovers.

VOUT2 recovers.

UVLO latches DL_ low.

J

K

L

M

N

O

P

I

Exiting UVLO: DL_ remains latched low until the first fall

of DH_ is detected.

DL_ is high after EN is pulled low and soft-stop is complete.

Figure 4. MAX1858A Detailed Power-On-Off Sequencing