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MAX2430IEE Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX2430IEE Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 10 page Low-Voltage, Silicon RF Power Amplifier/Predriver _______________________________________________________________________________________ 7 An overall loaded Q ≤ 5 can be achieved with readily available surface-mount components. This network absorbs the parasitic elements of the surface-mount components in such a way that they do not negatively impact the stopband characteristics; in fact, they can improve the overall stopband attenuation with properly chosen components. High-Q components (Q > 100) that have self-resonance near the 3rd harmonic of the intended output frequency should provide good pass- band characteristics with low loss, while offering good attenuation of the undesired 2nd and 3rd harmonics that are generated. Note that most applications will require extra filtering components and good shielding after the matching network to ensure absolute attenua- tion of out-of-band signals in order to meet out-of-band spurious suppression requirements. Output Mismatch Considerations The MAX2430 will typically withstand an output load mismatch of VSWR = 6:1 at any electrical phase without exhibiting oscillatory behavior over the entire supply voltage range of 3V to 5.5V. Resistor RC enhances sta- bility under load mismatch conditions and does not affect normal operation of the circuit. BIAS Pin The voltage at the BIAS pin controls the output power transistor biasing. At BIAS = 0.6V, the output transistor is biased to Class C, resulting in low gain and relatively nonlinear power. Above 2V, the output stage is biased to Class AB. Note that changing the bias voltage may degrade the output transistor’s stability. The shutdown pin (SHDN) controls the master bias cir- cuit, which in turn provides a control current of approxi- mately ±500µA to the external capacitor connected to the BIAS pin. When SHDN transitions from low to high, the BIAS pin capacitor charges up and clamps at approximately 2.2V. When SHDN transitions from high to low, the BIAS pin capacitor is discharged to nearly ground. This results in a power-up/power-down ramp- ing of the RF envelope, which can be approximated by the following equation: tramp ≅ CBIAS x 2.2V / 0.5mA = 4400Ω x CBIAS Therefore, a 2.2nF capacitor will give approximately 10µs ramp time. The BIAS pin can also be used to control the final output power and gain over a 15dB range, by forcing the BIAS pin voltage externally between 0.6V and 2.4V. Note that the BIAS pin driver must be able to source/sink 700µA. Forcing the BIAS pin directly in this manner disrupts the RF envelope timing function. To avoid this, place a diode in series with the BIAS pin control circuit, as shown in Figure 2. Note that when using the BIAS pin for power control, linearity is much degraded at the lower power levels. Operating Frequency Range The MAX2430 has been characterized for operation in the 800MHz to 1000MHz range. Operation outside this range is possible, but the following issues must be con- sidered: • Gain increases substantially at lower frequencies, possibly causing stability problems. • Useful gain and output power levels drop rapidly above 1000MHz. MAX2430 BIAS 10 0V TO 2.0V POWER CONTROL 2 CBIAS SHDN MASTER BIAS 2.2V CLAMP OUTPUT BIAS Figure 2. Power-Control Application Using BIAS Pin |
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