1.

General description

The 74LV164 is a low-voltage, Si-gate CMOS device and is pin and function compatible

with the 74HC164 and 74HCT164.

The 74LV164 is an 8-bit edge-triggered shift register with serial data entry and an output

from each of the eight stages. Data is entered serially through one of two inputs (DSA or

DSB) and either input can be used as an active HIGH enable for data entry through the

other input. Both inputs must be connected together or an unused input must be tied

HIGH.

Data shifts one place to the right on each LOW-to-HIGH transition of the clock input (CP)

and enters into Q0, which is the logical AND-function of the two data inputs (DSA and

DSB) that existed one set-up time prior to the rising clock edge.

A LOW on the master reset input (MR) overrides all other inputs and clears the register

asynchronously, forcing all outputs LOW.

2.

Features

−40 °Cto+80 °C and from −40 °C to +125 °C.

3.

Quick reference data

74LV164

8-bit serial-in/parallel-out shift register

Rev. 03 — 4 February 2005

Product data sheet

Table 1:

Quick reference data

Symbol Parameter

Conditions

Min

Typ

Max

Unit

propagation delay

CP to Qn

-

12

-

ns

MR to Qn

-

12

-

ns