Precision, Quad, SPST Analog Switches

_______________________________________________________________________________________

7

tr < 20ns

tf < 20ns

50%

0V

LOGIC

INPUT

V-

-15V

300

Ω

NO1

OR NC1

GND

(

)

SWITCH

INPUT

IN1

+3V

0V

COM1

SWITCH

OUTPUT

SWITCH

OUTPUT

LOGIC

INPUT

LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

VL

V+

35pF

+5V

+15V

0V

REPEAT TEST FOR IN AND S, FOR LOAD

CONDITIONS, SEE

Electrical Characteristics

50%

0.9V01

+3V

0V

0V

LOGIC

INPUT

SWITCH

OUTPUT 2

(VO2)

0V

0.9V02

tD

tD

LOGIC

INPUT

V-

-15V

GND

COM_

IN_

VL

COM_

V+

+5V

+15V

NO_

NC_

SWITCH

OUTPUT 1

(VO1)

Figure 2. Switching-Time Test Circuit

Figure 3. Break-Before-Make Test Circuit (MAX353 only)

______________________________________________Test Circuits/Timing Diagrams