74LVC32245A

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 3 — 16 December 2011

4 of 14

NXP Semiconductors

74LVC32245A

32-bit bus transceiver with direction pin; 5 V tolerant; 3-state

5.

Pinning information

5.1 Pinning

5.2 Pin description

6.

Functional description

[1]

H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state

Fig 2.

Pin configuration

mna475

1A1

1A3

1A5

1A7

2A1

2A3

2A5

2A6

3A1

3A3

3A5

3A7

4A1

4A3

4A5

4A6

1A0

1A2

1A4

1A6

2A0

2A2

2A4

2A7

3A0

3A2

3A4

3A6

4A0

4A2

4A4

4A7

1B0

1B2

1B4

1B6

2B0

2B2

2B4

2B7

3B0

3B2

3B4

3B6

4B0

4B2

4B4

4B7

1B1

1B3

1B5

1B7

2B1

2B3

2B5

2B6

3B1

3B3

3B5

3B7

4B1

4B3

4B5

4B6

1OE

2OE 3OE

GND

GND GND

GND

4OE

VCC

VCC

GND

GND GND

GND

VCC

VCC

1DIR

6

5

2

1

4

3

2DIR 3DIR

GND

GND GND

GND

4DIR

VCC

VCC

GND

GND GND

GND

VCC

VCC

AH

J

BD

E

G

T

CF

K

M

N

R

LP

Table 2.

Pin description

Symbol

Ball

Description

nDIR (n = 1 to 4)

A3, H3, J3, T3

direction control

nOE (n = 1 to 4)

A4, H4, J4, T4

output enable input (active LOW)

1A[0:7]

A5, A6, B5, B6, C5, C6, D5, D6

input or output

1B[0:7]

A2, A1, B2, B1, C2, C1, D2, D1

input or output

2A[0:7]

E5, E6, F5, F6, G5, G6, H6, H5

input or output

2B[0:7]

E2, E1, F2, F1, G2, G1, H1, H2

input or output

3A[0:7]

J5, J6, K5, K6, L5, L6, M5, M6

input or output

3B[0:7]

J2, J1, K2, K1, L2, L1, M2, M1

input or output

4A[0:7]

N5, N6, P5, P6, R5, R6, T6, T5

input or output

4B[0:7]

N2, N1, P2, P1, R2, R1, T1, T2

input or output

GND

B3, B4, D3, D4, E3, E4, G3, G4, K3, K4,

M3, M4, N3, N4, R3, R4

ground (0 V)

C3, C4, F3, F4, L3, L4, P3, P4

supply voltage

Table 3.

Function selection[1]

Input

Output

nOE

nDIR

nAn

nBn

L

L

nAn = nBn

inputs

L

H

inputs

nBn = nAn

HX

Z

Z