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BQ24725ARGRR Datasheet(PDF) 34 Page - Texas Instruments

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Part # BQ24725ARGRR
Description  bq24725A 1-4 Cell Li Battery SMBus Charge Controller with N-Channel Power MOSFET Selector and Advanced Circuit Protection
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

BQ24725ARGRR Datasheet(HTML) 34 Page - Texas Instruments

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background image
To ACP
To ACN
Systemcurrent
Chargerinputcurrent
SinglepointconnectionatRAC
SystemPathPCB Trace
ChargerInputPCB Trace
R AC
ACP
ACN
Charger
R AC
R PCB
ICHRGIN
IBAT
ISYS
IDPM
(a)PCBLayout
(b)EquivalentCircuit
R
AC
To ACP
To ACN
SystemPathPCB Trace
Systemcurrent
Chargerinputcurrent
ChargerInputPCB Trace
ACP
ACN
R AC
Charger
R PCB
ICHRGIN
IBAT
ISYS
IDPM
(a)PCBLayout
(b)EquivalentCircuit
bq24725A
SLUSAL0A – SEPTEMBER 2011 – REVISED AUGUST 2014
www.ti.com
To prevent unintentional charger shut down in normal operation, MOSFET RDS(on) selection and PCB layout is
very important. Figure 21 shows a improvement PCB layout example and its equivalent circuit. In this layout, the
system current path and charger input current path is not separated, as a result, the system current causes
voltage drop in the PCB copper and is sensed by the IC. The worst layout is when a system current pull point is
after charger input; as a result all system current voltage drops are counted into over current protection
comparator. The worst case for IC is when the total system current and charger input current sum equals the
DPM current. When the system pulls more current, the charger IC tries to regulate the RAC current as a constant
current by reducing the charging current.
Figure 21. Need improve PCB layout example.
Figure 22 shows the optimized PCB layout example. The system current path and charge input current path is
separated, as a result the IC only senses charger input current caused PCB voltage drop and minimized the
possibility of unintentional charger shut down in normal operation. This also makes PCB layout easier for high
system current application.
Figure 22. Optimized PCB layout example.
The total voltage drop sensed by IC can be express as the following equation.
Vtop = RAC x IDPM + RPCB x (ICHRGIN + (IDPM - ICHRGIN) x k) + RDS(on) x IPEAK
(15)
where the RAC is the AC adapter current sensing resistance, IDPM is the DPM current set point, RPCB is the PCB
trace equivalent resistance, ICHRGIN is the charger input current, k is the PCB factor, RDS(on) is the high side
MOSFET turn on resistance and IPEAK is the peak current of inductor. Here the PCB factor k equals 0 means the
best layout shown in Figure 22 where the PCB trace only goes through charger input current while k equals 1
means the worst layout shown in Figure 21 where the PCB trace goes through all the DPM current. The total
voltage drop must below the high side short circuit protection threshold to prevent unintentional charger shut
down in normal operation.
The low side MOSFET short circuit voltage drop threshold can be adjusted via SMBus command.
ChargeOption() bit[7] =0, 1 set the low side threshold 135mV and 230mV respectively. The high side MOSFET
short circuit voltage drop threshold can be adjusted via SMBus command. ChargeOption() bit[8] = 0, 1 disable
the function and set the threshold 750mV respectively. For a fixed PCB layout, host should set proper short
circuit protection threshold level to prevent unintentional charger shut down in normal operation.
34
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Copyright © 2011–2014, Texas Instruments Incorporated
Product Folder Links: bq24725A


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