 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
FT240X Datasheet(PDF) 8 Page - Future Technology Devices International Ltd. |
|
||||||||||||||||||||||||||||||
FT240X Datasheet(HTML) 8 Page - Future Technology Devices International Ltd. |
|
|
8 / 40 page  Copyright © 2013 Future Technology Devices International Limited 8 FT240X USB 8-BIT FIFO IC Datasheet Version 1.3 Document No.: FT_000626 Clearance No.: FTDI# 259 Pin No. Name Type Description 16 RESET# Input Active low reset pin. This can be used by an external device to reset the FT240X. If not required can be left unconnected, or pulled up to VCC. 10 SIWU# Input Active low input. May be used to flush the IC buffer back to the PC (Send Immediate) or if the PC is in suspend mode it can be used as a Wake Up signal. 23 CBUS5 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device MTP memory. See CBUS Signal Options, Table 3.9. 22 CBUS6 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device MTP memory. See CBUS Signal Options, Table 3.9. Table 3.3 Miscellaneous Signal Group Pin No. Name Type Description 24 D0 I/O FIFO Data Bus Bit 0 4 D1 I/O FIFO Data Bus Bit 1 2 D2 I/O FIFO Data Bus Bit 2 9 D3 I/O FIFO Data Bus Bit 3 1 D4 I/O FIFO Data Bus Bit 4 7 D5 I/O FIFO Data Bus Bit 5 8 D6 I/O FIFO Data Bus Bit 6 5 D7 I/O FIFO Data Bus Bit 7 11 RD# Input Enables the current FIFO data byte on D0...D7 when low. Fetched the next FIFO data byte (if available) from the receive FIFO buffer when RD# goes from high to low. See Section 3.6 for timing diagram. 12 WR Input Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR goes from high to low. See Section 3.7 for timing diagram. 20 TXE# Output When high, do not write data into the FIFO. When low, data can be written into the FIFO by strobing WR high, then low. During reset this signal pin is tri-state. See Section 3.7 for timing diagram. 21 RXF# Output When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by strobing RD# low, then high again. During reset this signal pin is tri-state. See Section 3.6 for timing diagram. If the Remote Wakeup option is enabled in the internal MTP memory, during USB suspend mode (PWREN# = 1) RXF# becomes an input. This can be used to wake up the USB host from suspend mode by strobing this pin low for a minimum of 20ms which will cause the device to request a resume on the USB bus. Table 3.4 FIFO Interface Group (see note 2) Notes: When used in Input Mode, the input pins are pulled to VCCIO via internal 200kΩ resistors. These pins can be programmed to gently pull low during USB suspend (PWREN# = “1”) by setting an option in the internal MTP memory. |
Similar Part No. - FT240X |
|
Similar Description - FT240X |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
